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[AArch64] Fix legality info passed to demanded bits for TBI opt.

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The (seldom-used) TBI-aware optimization had a typo lying dormant since
it was first introduced, in r252573:  when asking for demanded bits, it
told TLI that it was running after legalize, where the opposite was
true.

This is an important piece of information, that the demanded bits
analysis uses to make assumptions about the node.  r301019 added such an
assumption, which was broken by the TBI combine.

Instead, pass the correct flags to TLO.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@309323 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Ahmed Bougacha 2017-07-27 21:27:25 +00:00
parent 876aa0d1c6
commit 9f209a97f2
2 changed files with 13 additions and 2 deletions
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4
lib/Target/AArch64/AArch64ISelLowering.cpp
View File

@ -9585,8 +9585,8 @@ static bool performTBISimplification(SDValue Addr,
SelectionDAG &DAG) {
APInt DemandedMask = APInt::getLowBitsSet(64, 56);
KnownBits Known;
TargetLowering::TargetLoweringOpt TLO(DAG, DCI.isBeforeLegalize(),
DCI.isBeforeLegalizeOps());
TargetLowering::TargetLoweringOpt TLO(DAG, !DCI.isBeforeLegalize(),
!DCI.isBeforeLegalizeOps());
const TargetLowering &TLI = DAG.getTargetLoweringInfo();
if (TLI.SimplifyDemandedBits(Addr, DemandedMask, Known, TLO)) {
DCI.CommitTargetLoweringOpt(TLO);

11
test/CodeGen/AArch64/tbi.ll
View File

@ -100,3 +100,14 @@ define i32 @ld_and32_narrower(i64 %p) {
%load = load i32, i32* %cast
ret i32 %load
}
; BOTH-LABEL:ld_and8:
; BOTH: and x
define i32 @ld_and8(i64 %base, i8 %off) {
%off_masked = and i8 %off, 63
%off_64 = zext i8 %off_masked to i64
%p = add i64 %base, %off_64
%cast = inttoptr i64 %p to i32*
%load = load i32, i32* %cast
ret i32 %load
}