RPCS3/llvm
1
0
Fork 0
mirror of https://github.com/RPCS3/llvm.git synced 2025-01-30 15:22:41 +00:00
Code Issues Actions Packages Projects Releases Wiki Activity

[SystemZ] Use LOAD AND TEST for comparisons with -0

Browse Source 
...since it os equivalent to comparison with +0.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196580 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Richard Sandiford 2013-12-06 09:59:12 +00:00
parent 8bf51dc72b
commit 9f9758935a
3 changed files with 27 additions and 5 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

6
lib/Target/SystemZ/SystemZInstrFP.td
View File

@ -46,9 +46,9 @@ let Defs = [CC], CCValues = 0xF, CompareZeroCCMask = 0xF in {
defm LTDBR : LoadAndTestRRE<"ltdb", 0xB312, FP64>;
defm LTXBR : LoadAndTestRRE<"ltxb", 0xB342, FP128>;
}
def : CompareZeroFP<LTEBRCompare, FP32>;
def : CompareZeroFP<LTDBRCompare, FP64>;
def : CompareZeroFP<LTXBRCompare, FP128>;
defm : CompareZeroFP<LTEBRCompare, FP32>;
defm : CompareZeroFP<LTDBRCompare, FP64>;
defm : CompareZeroFP<LTXBRCompare, FP128>;
// Moves between 64-bit integer and floating-point registers.
def LGDR : UnaryRRE<"lgd", 0xB3CD, bitconvert, GR64, FP64>;

7
lib/Target/SystemZ/SystemZPatterns.td
View File

@ -148,5 +148,8 @@ multiclass BlockLoadStore<SDPatternOperator load, ValueType vt,
// Record that INSN is a LOAD AND TEST that can be used to compare
// registers in CLS against zero. The instruction has separate R1 and R2
// operands, but they must be the same when the instruction is used like this.
class CompareZeroFP<Instruction insn, RegisterOperand cls>
: Pat<(z_fcmp cls:$reg, (fpimm0)), (insn cls:$reg, cls:$reg)>;
multiclass CompareZeroFP<Instruction insn, RegisterOperand cls> {
def : Pat<(z_fcmp cls:$reg, (fpimm0)), (insn cls:$reg, cls:$reg)>;
// The sign of the zero makes no difference.
def : Pat<(z_fcmp cls:$reg, (fpimmneg0)), (insn cls:$reg, cls:$reg)>;
}

19
test/CodeGen/SystemZ/fp-cmp-04.ll
View File

@ -346,3 +346,22 @@ store:
exit:
ret double %val
}
; Repeat f2 with a comparison against -0.
define float @f17(float %a, float %b, float *%dest) {
; CHECK-LABEL: f17:
; CHECK: aebr %f0, %f2
; CHECK-NEXT: jl .L{{.*}}
; CHECK: br %r14
entry:
%res = fadd float %a, %b
%cmp = fcmp olt float %res, -0.0
br i1 %cmp, label %exit, label %store
store:
store float %b, float *%dest
br label %exit
exit:
ret float %res
}