RPCS3/llvm
1
0
Fork 0
mirror of https://github.com/RPCS3/llvm.git synced 2024-12-20 19:20:23 +00:00
Code Issues Actions Packages Projects Releases Wiki Activity

Cleanup whitespace and comments, and tweak some

Browse Source 
prototypes, in operand type legalization.  No
functionality change.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62680 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Duncan Sands 2009-01-21 09:00:29 +00:00
parent d3be46214c
commit 9fbc7e2e7a
8 changed files with 74 additions and 78 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

21
include/llvm/Target/TargetLowering.h
View File

@ -1131,23 +1131,22 @@ public:
return SDValue();
}
/// LowerOperationWrapper - This callback is invoked by the type legalizer
/// to legalize operation with illegal operand types but legal result types;
/// LowerOperationWrapper - This callback is invoked by the type legalizer
/// to legalize nodes with an illegal operand type but legal result types.
/// It replaces the LowerOperation callback in the type Legalizer.
/// The reason we can not do away with LowerOperation entirely is that
/// The reason we can not do away with LowerOperation entirely is that
/// LegalizeDAG isn't yet ready to use this callback.
/// The target places new result values for the node in Results (their number
/// and types must exactly match those of the original return values of
/// the node), or leaves Results empty, which indicates that the node is not
/// to be custom lowered after all.
/// In its default implementation it calls the LowerOperation.
/// TODO: Consider merging with ReplaceNodeResults.
virtual void LowerOperationWrapper(SDValue Op,
/// The target places new result values for the node in Results (their number
/// and types must exactly match those of the original return values of
/// the node), or leaves Results empty, which indicates that the node is not
/// to be custom lowered after all.
/// The default implementation calls LowerOperation.
virtual void LowerOperationWrapper(SDNode *N,
SmallVectorImpl<SDValue> &Results,
SelectionDAG &DAG);
/// LowerOperation - This callback is invoked for operations that are
/// unsupported by the target, which are registered to use 'custom' lowering,
/// and whose defined values are all legal.

2
lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp
View File

@ -722,7 +722,7 @@ void DAGTypeLegalizer::ExpandFloatResult(SDNode *N, unsigned ResNo) {
Lo = Hi = SDValue();
// See if the target wants to custom expand this node.
if (CustomLowerResults(N, ResNo, true))
if (CustomLowerResults(N, N->getValueType(ResNo), true))
return;
switch (N->getOpcode()) {

84
lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
View File

@ -31,10 +31,10 @@ using namespace llvm;
/// expansion, we just know that (at least) one result needs promotion.
void DAGTypeLegalizer::PromoteIntegerResult(SDNode *N, unsigned ResNo) {
DEBUG(cerr << "Promote integer result: "; N->dump(&DAG); cerr << "\n");
SDValue Result = SDValue();
SDValue Res = SDValue();
// See if the target wants to custom expand this node.
if (CustomLowerResults(N, ResNo, true))
if (CustomLowerResults(N, N->getValueType(ResNo), true))
return;
switch (N->getOpcode()) {
@ -45,58 +45,58 @@ void DAGTypeLegalizer::PromoteIntegerResult(SDNode *N, unsigned ResNo) {
#endif
assert(0 && "Do not know how to promote this operator!");
abort();
case ISD::AssertSext: Result = PromoteIntRes_AssertSext(N); break;
case ISD::AssertZext: Result = PromoteIntRes_AssertZext(N); break;
case ISD::BIT_CONVERT: Result = PromoteIntRes_BIT_CONVERT(N); break;
case ISD::BSWAP: Result = PromoteIntRes_BSWAP(N); break;
case ISD::BUILD_PAIR: Result = PromoteIntRes_BUILD_PAIR(N); break;
case ISD::Constant: Result = PromoteIntRes_Constant(N); break;
case ISD::AssertSext: Res = PromoteIntRes_AssertSext(N); break;
case ISD::AssertZext: Res = PromoteIntRes_AssertZext(N); break;
case ISD::BIT_CONVERT: Res = PromoteIntRes_BIT_CONVERT(N); break;
case ISD::BSWAP: Res = PromoteIntRes_BSWAP(N); break;
case ISD::BUILD_PAIR: Res = PromoteIntRes_BUILD_PAIR(N); break;
case ISD::Constant: Res = PromoteIntRes_Constant(N); break;
case ISD::CONVERT_RNDSAT:
Result = PromoteIntRes_CONVERT_RNDSAT(N); break;
case ISD::CTLZ: Result = PromoteIntRes_CTLZ(N); break;
case ISD::CTPOP: Result = PromoteIntRes_CTPOP(N); break;
case ISD::CTTZ: Result = PromoteIntRes_CTTZ(N); break;
Res = PromoteIntRes_CONVERT_RNDSAT(N); break;
case ISD::CTLZ: Res = PromoteIntRes_CTLZ(N); break;
case ISD::CTPOP: Res = PromoteIntRes_CTPOP(N); break;
case ISD::CTTZ: Res = PromoteIntRes_CTTZ(N); break;
case ISD::EXTRACT_VECTOR_ELT:
Result = PromoteIntRes_EXTRACT_VECTOR_ELT(N); break;
case ISD::LOAD: Result = PromoteIntRes_LOAD(cast<LoadSDNode>(N));break;
case ISD::SELECT: Result = PromoteIntRes_SELECT(N); break;
case ISD::SELECT_CC: Result = PromoteIntRes_SELECT_CC(N); break;
case ISD::SETCC: Result = PromoteIntRes_SETCC(N); break;
case ISD::SHL: Result = PromoteIntRes_SHL(N); break;
Res = PromoteIntRes_EXTRACT_VECTOR_ELT(N); break;
case ISD::LOAD: Res = PromoteIntRes_LOAD(cast<LoadSDNode>(N));break;
case ISD::SELECT: Res = PromoteIntRes_SELECT(N); break;
case ISD::SELECT_CC: Res = PromoteIntRes_SELECT_CC(N); break;
case ISD::SETCC: Res = PromoteIntRes_SETCC(N); break;
case ISD::SHL: Res = PromoteIntRes_SHL(N); break;
case ISD::SIGN_EXTEND_INREG:
Result = PromoteIntRes_SIGN_EXTEND_INREG(N); break;
case ISD::SRA: Result = PromoteIntRes_SRA(N); break;
case ISD::SRL: Result = PromoteIntRes_SRL(N); break;
case ISD::TRUNCATE: Result = PromoteIntRes_TRUNCATE(N); break;
case ISD::UNDEF: Result = PromoteIntRes_UNDEF(N); break;
case ISD::VAARG: Result = PromoteIntRes_VAARG(N); break;
Res = PromoteIntRes_SIGN_EXTEND_INREG(N); break;
case ISD::SRA: Res = PromoteIntRes_SRA(N); break;
case ISD::SRL: Res = PromoteIntRes_SRL(N); break;
case ISD::TRUNCATE: Res = PromoteIntRes_TRUNCATE(N); break;
case ISD::UNDEF: Res = PromoteIntRes_UNDEF(N); break;
case ISD::VAARG: Res = PromoteIntRes_VAARG(N); break;
case ISD::SIGN_EXTEND:
case ISD::ZERO_EXTEND:
case ISD::ANY_EXTEND: Result = PromoteIntRes_INT_EXTEND(N); break;
case ISD::ANY_EXTEND: Res = PromoteIntRes_INT_EXTEND(N); break;
case ISD::FP_TO_SINT:
case ISD::FP_TO_UINT: Result = PromoteIntRes_FP_TO_XINT(N); break;
case ISD::FP_TO_UINT: Res = PromoteIntRes_FP_TO_XINT(N); break;
case ISD::AND:
case ISD::OR:
case ISD::XOR:
case ISD::ADD:
case ISD::SUB:
case ISD::MUL: Result = PromoteIntRes_SimpleIntBinOp(N); break;
case ISD::MUL: Res = PromoteIntRes_SimpleIntBinOp(N); break;
case ISD::SDIV:
case ISD::SREM: Result = PromoteIntRes_SDIV(N); break;
case ISD::SREM: Res = PromoteIntRes_SDIV(N); break;
case ISD::UDIV:
case ISD::UREM: Result = PromoteIntRes_UDIV(N); break;
case ISD::UREM: Res = PromoteIntRes_UDIV(N); break;
case ISD::SADDO:
case ISD::SSUBO: Result = PromoteIntRes_SADDSUBO(N, ResNo); break;
case ISD::SSUBO: Res = PromoteIntRes_SADDSUBO(N, ResNo); break;
case ISD::UADDO:
case ISD::USUBO: Result = PromoteIntRes_UADDSUBO(N, ResNo); break;
case ISD::USUBO: Res = PromoteIntRes_UADDSUBO(N, ResNo); break;
case ISD::SMULO:
case ISD::UMULO: Result = PromoteIntRes_XMULO(N, ResNo); break;
case ISD::UMULO: Res = PromoteIntRes_XMULO(N, ResNo); break;
case ISD::ATOMIC_LOAD_ADD:
case ISD::ATOMIC_LOAD_SUB:
@ -109,15 +109,15 @@ void DAGTypeLegalizer::PromoteIntegerResult(SDNode *N, unsigned ResNo) {
case ISD::ATOMIC_LOAD_UMIN:
case ISD::ATOMIC_LOAD_UMAX:
case ISD::ATOMIC_SWAP:
Result = PromoteIntRes_Atomic1(cast<AtomicSDNode>(N)); break;
Res = PromoteIntRes_Atomic1(cast<AtomicSDNode>(N)); break;
case ISD::ATOMIC_CMP_SWAP:
Result = PromoteIntRes_Atomic2(cast<AtomicSDNode>(N)); break;
Res = PromoteIntRes_Atomic2(cast<AtomicSDNode>(N)); break;
}
// If Result is null, the sub-method took care of registering the result.
if (Result.getNode())
SetPromotedInteger(SDValue(N, ResNo), Result);
// If the result is null then the sub-method took care of registering it.
if (Res.getNode())
SetPromotedInteger(SDValue(N, ResNo), Res);
}
SDValue DAGTypeLegalizer::PromoteIntRes_AssertSext(SDNode *N) {
@ -623,7 +623,7 @@ bool DAGTypeLegalizer::PromoteIntegerOperand(SDNode *N, unsigned OpNo) {
DEBUG(cerr << "Promote integer operand: "; N->dump(&DAG); cerr << "\n");
SDValue Res = SDValue();
if (CustomLowerResults(N, OpNo, false))
if (CustomLowerResults(N, N->getOperand(OpNo).getValueType(), false))
return false;
switch (N->getOpcode()) {
@ -656,9 +656,9 @@ bool DAGTypeLegalizer::PromoteIntegerOperand(SDNode *N, unsigned OpNo) {
case ISD::UINT_TO_FP: Res = PromoteIntOp_UINT_TO_FP(N); break;
case ISD::ZERO_EXTEND: Res = PromoteIntOp_ZERO_EXTEND(N); break;
}
// If the result is null, the sub-method took care of registering results etc.
if (! Res.getNode()) return false;
if (!Res.getNode()) return false;
// If the result is N, the sub-method updated N in place. Tell the legalizer
// core about this.
@ -918,7 +918,7 @@ void DAGTypeLegalizer::ExpandIntegerResult(SDNode *N, unsigned ResNo) {
Lo = Hi = SDValue();
// See if the target wants to custom expand this node.
if (CustomLowerResults(N, ResNo, true))
if (CustomLowerResults(N, N->getValueType(ResNo), true))
return;
switch (N->getOpcode()) {
@ -1848,7 +1848,7 @@ bool DAGTypeLegalizer::ExpandIntegerOperand(SDNode *N, unsigned OpNo) {
DEBUG(cerr << "Expand integer operand: "; N->dump(&DAG); cerr << "\n");
SDValue Res = SDValue();
if (CustomLowerResults(N, OpNo, false))
if (CustomLowerResults(N, N->getOperand(OpNo).getValueType(), false))
return false;
switch (N->getOpcode()) {

14
lib/CodeGen/SelectionDAG/LegalizeTypes.cpp
View File

@ -848,27 +848,23 @@ SDValue DAGTypeLegalizer::CreateStackStoreLoad(SDValue Op,
/// CustomLowerResults - Replace the node's results with custom code provided
/// by the target and return "true", or do nothing and return "false".
/// The last parameter is FALSE if we are dealing with a node with legal
/// The last parameter is FALSE if we are dealing with a node with legal
/// result types and illegal operand. The second parameter denotes the illegal
/// OperandNo in that case.
/// The last parameter being TRUE means we are dealing with a
/// node with illegal result types. The second parameter denotes the illegal
/// node with illegal result types. The second parameter denotes the illegal
/// ResNo in that case.
bool DAGTypeLegalizer::CustomLowerResults(SDNode *N, unsigned Num,
bool DAGTypeLegalizer::CustomLowerResults(SDNode *N, MVT VT,
bool LegalizeResult) {
// Get the type of illegal Result or Operand.
MVT ValueTy = (LegalizeResult) ? N->getValueType(Num)
: N->getOperand(Num).getValueType();
// See if the target wants to custom lower this node.
if (TLI.getOperationAction(N->getOpcode(), ValueTy) != TargetLowering::Custom)
if (TLI.getOperationAction(N->getOpcode(), VT) != TargetLowering::Custom)
return false;
SmallVector<SDValue, 8> Results;
if (LegalizeResult)
TLI.ReplaceNodeResults(N, Results, DAG);
else
TLI.LowerOperationWrapper(SDValue(N, 0), Results, DAG);
TLI.LowerOperationWrapper(N, Results, DAG);
if (Results.empty())
// The target didn't want to custom lower it after all.

2
lib/CodeGen/SelectionDAG/LegalizeTypes.h
View File

@ -191,7 +191,7 @@ private:
// Common routines.
SDValue BitConvertToInteger(SDValue Op);
SDValue CreateStackStoreLoad(SDValue Op, MVT DestVT);
bool CustomLowerResults(SDNode *N, unsigned ResNo, bool LegalizeResult);
bool CustomLowerResults(SDNode *N, MVT VT, bool LegalizeResult);
SDValue GetVectorElementPointer(SDValue VecPtr, MVT EltVT, SDValue Index);
SDValue JoinIntegers(SDValue Lo, SDValue Hi);
SDValue LibCallify(RTLIB::Libcall LC, SDNode *N, bool isSigned);

9
lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp
View File

@ -5568,11 +5568,10 @@ TargetLowering::LowerCallTo(SDValue Chain, const Type *RetTy,
return std::make_pair(Res, Chain);
}
void TargetLowering::LowerOperationWrapper(SDValue Op,
SmallVectorImpl<SDValue> &Results,
SelectionDAG &DAG) {
SDValue Res;
Res = LowerOperation(Op, DAG);
void TargetLowering::LowerOperationWrapper(SDNode *N,
SmallVectorImpl<SDValue> &Results,
SelectionDAG &DAG) {
SDValue Res = LowerOperation(SDValue(N, 0), DAG);
if (Res.getNode())
Results.push_back(Res);
}

14
lib/Target/PIC16/PIC16ISelLowering.cpp
View File

@ -762,9 +762,11 @@ SDValue PIC16TargetLowering::LowerShift(SDValue Op, SelectionDAG &DAG) {
return Call;
}
void PIC16TargetLowering::LowerOperationWrapper(SDValue Op,
SmallVectorImpl<SDValue>&Results,
SelectionDAG &DAG) {
void
PIC16TargetLowering::LowerOperationWrapper(SDNode *N,
SmallVectorImpl<SDValue>&Results,
SelectionDAG &DAG) {
SDValue Op = SDValue(N, 0);
SDValue Res;
unsigned i;
switch (Op.getOpcode()) {
@ -783,12 +785,12 @@ void PIC16TargetLowering::LowerOperationWrapper(SDValue Op,
return;
}
}
SDNode *N = Res.getNode();
N = Res.getNode();
unsigned NumValues = N->getNumValues();
for (i=0; i< NumValues ; i++) {
for (i = 0; i < NumValues ; i++) {
Results.push_back(SDValue(N, i));
}
}
SDValue PIC16TargetLowering::LowerOperation(SDValue Op, SelectionDAG &DAG) {

6
lib/Target/PIC16/PIC16ISelLowering.h
View File

@ -97,9 +97,9 @@ namespace llvm {
virtual void ReplaceNodeResults(SDNode *N,
SmallVectorImpl<SDValue> &Results,
SelectionDAG &DAG);
virtual void LowerOperationWrapper(SDValue Op,
SmallVectorImpl<SDValue> &Results,
SelectionDAG &DAG);
virtual void LowerOperationWrapper(SDNode *N,
SmallVectorImpl<SDValue> &Results,
SelectionDAG &DAG);
SDValue ExpandStore(SDNode *N, SelectionDAG &DAG);
SDValue ExpandLoad(SDNode *N, SelectionDAG &DAG);