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Revert changes. Will implement this using a different set of primitives

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11091 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Alkis Evlogimenos 2004-02-02 23:08:58 +00:00
parent cc6a1290fc
commit 9fe7602862
2 changed files with 3 additions and 12 deletions
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3
include/llvm/CodeGen/MachineInstr.h
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@ -288,9 +288,6 @@ public:
bool isHiBits64 () const { return flags & HIFLAG64; }
bool isLoBits64 () const { return flags & LOFLAG64; }
MachineOperand& setUse () { flags |= USEFLAG; return *this; }
MachineOperand& setDef () { flags |= DEFFLAG; return *this; }
// used to check if a machine register has been allocated to this operand
bool hasAllocatedReg() const {
return (regNum >= 0 &&

12
lib/CodeGen/TwoAddressInstructionPass.cpp
View File

@ -146,17 +146,11 @@ bool TwoAddressInstructionPass::runOnMachineFunction(MachineFunction &MF) {
LV.addVirtualRegisterDead(regB, &*mbbi, prevMi);
// replace all occurences of regB with regA
// and mark all uses and defs of regA as def&use
for (unsigned i = 1; i < mi->getNumOperands(); ++i) {
MachineOperand& op = mi->getOperand(i);
if (op.isRegister()) {
if (op.getReg() == regB)
mi->SetMachineOperandReg(i, regA);
if (op.getReg() == regA)
op.setDef().setUse();
}
if (mi->getOperand(i).isRegister() &&
mi->getOperand(i).getReg() == regB)
mi->SetMachineOperandReg(i, regA);
}
DEBUG(std::cerr << "\t\tmodified original to: ";
mi->print(std::cerr, TM));
assert(mi->getOperand(0).getAllocatedRegNum() ==