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Fixed the asmstrings for 8-bit, 16-bit, and 32-bit ADD %rAX, imm instructions.

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Added a 64-bit ADD %RAX, imm32 instruction.
Added all 4 forms for AND %rAX, imm and CMP %rAX, imm.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80746 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Sean Callanan 2009-09-02 00:55:49 +00:00
parent 94f07d8137
commit a09caa56d6
2 changed files with 28 additions and 3 deletions
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10
lib/Target/X86/X86Instr64bit.td
View File

@ -392,6 +392,10 @@ let neverHasSideEffects = 1 in {
//
let Defs = [EFLAGS] in {
def ADD64i32 : RI<0x05, RawFrm, (outs), (ins i32imm:$src),
"add{q}\t{$src, %rax|%rax, $src}", []>;
let isTwoAddress = 1 in {
let isConvertibleToThreeAddress = 1 in {
let isCommutable = 1 in
@ -870,6 +874,9 @@ def NOT64m : RI<0xF7, MRM2m, (outs), (ins i64mem:$dst), "not{q}\t$dst",
[(store (not (loadi64 addr:$dst)), addr:$dst)]>;
let Defs = [EFLAGS] in {
def AND64i32 : RI<0x25, RawFrm, (outs), (ins i32imm:$src),
"and{q}\t{$src, %rax|%rax, $src}", []>;
let isTwoAddress = 1 in {
let isCommutable = 1 in
def AND64rr : RI<0x21, MRMDestReg,
@ -1006,6 +1013,9 @@ def TEST64mi32 : RIi32<0xF7, MRM0m, (outs),
[(X86cmp (and (loadi64 addr:$src1), i64immSExt32:$src2), 0),
(implicit EFLAGS)]>;
def CMP64i32 : RI<0x3D, RawFrm, (outs), (ins i32imm:$src),
"cmp{q}\t{$src, %rax|%rax, $src}", []>;
def CMP64rr : RI<0x39, MRMDestReg, (outs), (ins GR64:$src1, GR64:$src2),
"cmp{q}\t{$src2, $src1|$src1, $src2}",
[(X86cmp GR64:$src1, GR64:$src2),

21
lib/Target/X86/X86InstrInfo.td
View File

@ -1647,6 +1647,14 @@ let isTwoAddress = 0 in {
"and{l}\t{$src, $dst|$dst, $src}",
[(store (and (load addr:$dst), i32immSExt8:$src), addr:$dst),
(implicit EFLAGS)]>;
def AND8i8 : Ii8<0x24, RawFrm, (outs), (ins i8imm:$src),
"and{b}\t{$src, %al|%al, $src}", []>;
def AND16i16 : Ii16<0x25, RawFrm, (outs), (ins i16imm:$src),
"and{w}\t{$src, %ax|%ax, $src}", []>, OpSize;
def AND32i32 : Ii32<0x25, RawFrm, (outs), (ins i32imm:$src),
"and{l}\t{$src, %eax|%eax, $src}", []>;
}
@ -2396,11 +2404,11 @@ let isTwoAddress = 0 in {
// addition to rAX
def ADD8i8 : Ii8<0x04, RawFrm, (outs), (ins i8imm:$src),
"add\t{$src, %al|%al, $src}", []>;
"add{b}\t{$src, %al|%al, $src}", []>;
def ADD16i16 : Ii16<0x05, RawFrm, (outs), (ins i16imm:$src),
"add\t{$src, %ax|%ax, $src}", []>, OpSize;
"add{w}\t{$src, %ax|%ax, $src}", []>, OpSize;
def ADD32i32 : Ii32<0x05, RawFrm, (outs), (ins i32imm:$src),
"add\t{$src, %eax|%eax, $src}", []>;
"add{l}\t{$src, %eax|%eax, $src}", []>;
}
let Uses = [EFLAGS] in {
@ -2991,6 +2999,13 @@ def SETNOm : I<0x91, MRM0m,
// Integer comparisons
let Defs = [EFLAGS] in {
def CMP8i8 : Ii8<0x3C, RawFrm, (outs), (ins i8imm:$src),
"cmp{b}\t{$src, %al|%al, $src}", []>;
def CMP16i16 : Ii16<0x3D, RawFrm, (outs), (ins i16imm:$src),
"cmp{w}\t{$src, %ax|%ax, $src}", []>, OpSize;
def CMP32i32 : Ii32<0x3D, RawFrm, (outs), (ins i32imm:$src),
"cmp{l}\t{$src, %eax|%eax, $src}", []>;
def CMP8rr : I<0x38, MRMDestReg,
(outs), (ins GR8 :$src1, GR8 :$src2),
"cmp{b}\t{$src2, $src1|$src1, $src2}",