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[mips][FastISel] Fix call lowering by bailing out on "fastcc" calls.

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Summary:
Currently, we support only the MIPS O32 ABI calling convention for call
lowering. With this change we avoid using the O32 calling convetion for
lowering calls marked as using the fast calling convention.

Reviewers: dsanders

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D11515

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243485 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Vasileios Kalintiris 2015-07-28 21:43:31 +00:00
parent 86eea13bdb
commit a0b4070813
2 changed files with 25 additions and 0 deletions
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9
lib/Target/Mips/MipsFastISel.cpp
View File

@ -1245,6 +1245,10 @@ bool MipsFastISel::fastLowerCall(CallLoweringInfo &CLI) {
const Value *Callee = CLI.Callee;
MCSymbol *Symbol = CLI.Symbol;
// Do not handle FastCC.
if (CC == CallingConv::Fast)
return false;
// Allow SelectionDAG isel to handle tail calls.
if (IsTailCall)
return false;
@ -1422,6 +1426,11 @@ bool MipsFastISel::selectRet(const Instruction *I) {
if (Ret->getNumOperands() > 0) {
CallingConv::ID CC = F.getCallingConv();
// Do not handle FastCC.
if (CC == CallingConv::Fast)
return false;
SmallVector<ISD::OutputArg, 4> Outs;
GetReturnInfo(F.getReturnType(), F.getAttributes(), Outs, TLI, DL);

16
test/CodeGen/Mips/Fast-ISel/fastcc-miss.ll Normal file
View File

@ -0,0 +1,16 @@
; RUN: llc < %s -march=mipsel -mcpu=mips32r2 -O0 -relocation-model=pic \
; RUN: -fast-isel=true -mips-fast-isel -fast-isel-verbose 2>&1 | \
; RUN: FileCheck %s
; CHECK: FastISel missed call:
; CHECK-SAME: %call = call fastcc i32 @foo(i32 signext %a, i32 signext %b)
define internal i32 @bar(i32 signext %a, i32 signext %b) {
%s = and i32 %a, %b
ret i32 %s
}
define i32 @foo(i32 signext %a, i32 signext %b) {
%call = call fastcc i32 @foo(i32 signext %a, i32 signext %b)
ret i32 %call
}