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Reordered registers slightly to simplify a new check.
Added a function to map between the caller's and callee's register windows. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@941 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -23,8 +23,9 @@ static string const IntRegNames[] =
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"o0", "o1", "o2", "o3", "o4", "o5", "o7",
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"l0", "l1", "l2", "l3", "l4", "l5", "l6", "l7",
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"i0", "i1", "i2", "i3", "i4", "i5",
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"i6", "i7",
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"g0", "g1", "g2", "g3", "g4", "g5", "g6", "g7",
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"i6", "i7", "o6" };
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"o6" };
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@ -56,8 +57,8 @@ class SparcIntRegOrder{
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// --- following colors are not available for allocation within this phase
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// --- but can appear for pre-colored ranges
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g0, g1, g2, g3, g4, g5, g6, g7, i6, i7, o6
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i6, i7, g0, g1, g2, g3, g4, g5, g6, g7, o6
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//*** NOTE: If we decide to use globals, some of them are volatile
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//**** see sparc64ABI (change isRegVloatile method below)
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@ -77,6 +78,16 @@ class SparcIntRegOrder{
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return IntRegNames[reg];
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}
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static unsigned int getRegNumInCallersWindow(const unsigned reg) {
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if (reg <= l7 || reg == o6) {
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assert(0 && "registers o0-o7 and l0-l7 are not visible in caller");
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return reg;
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}
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if (reg <= i7)
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return reg - (i0 - o0);
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assert((reg >= g0 || reg <= g7) && "Unrecognized integer register number");
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return reg;
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}
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};
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