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[X86] Fix bug in legalize vector types - Split large loads
When splitting a large load to smaller legally-typed loads, the last load should be padded to reach the size of the previous one so a CONCAT_VECTORS node could reunite them again. The code currently pads the last load to reach the size of the first load (instead of the previous). Differential Revision: https://reviews.llvm.org/D38495 Change-Id: Ib60b55ed26ce901fabf68108daf52683fbd5013f git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317206 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Ayman Musa
parent
652842ec9a
commit
a223e90991
@ -3844,7 +3844,7 @@ SDValue DAGTypeLegalizer::GenWidenVectorLoads(SmallVectorImpl<SDValue> &LdChain,
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}
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LdOps.push_back(L);
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LdOp = L;
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LdWidth -= NewVTWidth;
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}
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209
test/CodeGen/X86/pr34653.ll
Normal file
209
test/CodeGen/X86/pr34653.ll
Normal file
@ -0,0 +1,209 @@
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc %s -O0 -mtriple=x86_64-unknown-unknown -mattr=+avx512f -o - | FileCheck %s
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declare fastcc <38 x double> @test()
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define void @pr34653() {
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; CHECK-LABEL: pr34653:
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; CHECK: # BB#0: # %entry
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; CHECK-NEXT: pushq %rbp
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; CHECK-NEXT: .cfi_def_cfa_offset 16
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; CHECK-NEXT: .cfi_offset %rbp, -16
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; CHECK-NEXT: movq %rsp, %rbp
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; CHECK-NEXT: .cfi_def_cfa_register %rbp
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; CHECK-NEXT: andq $-512, %rsp # imm = 0xFE00
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; CHECK-NEXT: subq $2048, %rsp # imm = 0x800
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; CHECK-NEXT: leaq {{[0-9]+}}(%rsp), %rdi
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; CHECK-NEXT: callq test
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; CHECK-NEXT: vmovupd {{[0-9]+}}(%rsp), %xmm0
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; CHECK-NEXT: vmovaps %xmm0, %xmm1
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; CHECK-NEXT: vpermilpd {{.*#+}} xmm0 = xmm0[1,0]
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; CHECK-NEXT: vmovupd {{[0-9]+}}(%rsp), %ymm2
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; CHECK-NEXT: vextractf128 $1, %ymm2, %xmm3
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; CHECK-NEXT: vmovaps %xmm3, %xmm4
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; CHECK-NEXT: vmovaps %xmm2, %xmm5
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; CHECK-NEXT: vmovaps %xmm5, %xmm6
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; CHECK-NEXT: vmovupd {{[0-9]+}}(%rsp), %zmm7
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; CHECK-NEXT: vmovupd {{[0-9]+}}(%rsp), %zmm8
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; CHECK-NEXT: vmovupd {{[0-9]+}}(%rsp), %zmm9
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; CHECK-NEXT: vmovupd {{[0-9]+}}(%rsp), %zmm10
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; CHECK-NEXT: vextractf32x4 $3, %zmm10, %xmm11
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; CHECK-NEXT: vmovaps %xmm11, %xmm12
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; CHECK-NEXT: vextractf32x4 $2, %zmm10, %xmm13
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; CHECK-NEXT: vmovaps %xmm13, %xmm14
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; CHECK-NEXT: vmovaps %xmm10, %xmm15
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; CHECK-NEXT: vmovaps %xmm15, %xmm2
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; CHECK-NEXT: vmovsd %xmm0, {{[0-9]+}}(%rsp) # 8-byte Spill
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; CHECK-NEXT: vextractf32x4 $3, %zmm9, %xmm0
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; CHECK-NEXT: vmovaps %xmm0, {{[0-9]+}}(%rsp) # 16-byte Spill
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; CHECK-NEXT: vmovsd %xmm0, {{[0-9]+}}(%rsp) # 8-byte Spill
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; CHECK-NEXT: vextractf32x4 $2, %zmm9, %xmm0
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; CHECK-NEXT: vmovaps %xmm0, {{[0-9]+}}(%rsp) # 16-byte Spill
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; CHECK-NEXT: vmovsd %xmm0, {{[0-9]+}}(%rsp) # 8-byte Spill
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; CHECK-NEXT: vmovaps %xmm9, %xmm0
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; CHECK-NEXT: vmovaps %xmm0, {{[0-9]+}}(%rsp) # 16-byte Spill
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; CHECK-NEXT: vmovsd %xmm0, {{[0-9]+}}(%rsp) # 8-byte Spill
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; CHECK-NEXT: vextractf32x4 $3, %zmm8, %xmm0
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; CHECK-NEXT: vmovaps %xmm0, {{[0-9]+}}(%rsp) # 16-byte Spill
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; CHECK-NEXT: vmovsd %xmm0, {{[0-9]+}}(%rsp) # 8-byte Spill
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; CHECK-NEXT: vextractf32x4 $2, %zmm8, %xmm0
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; CHECK-NEXT: vmovaps %xmm0, {{[0-9]+}}(%rsp) # 16-byte Spill
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; CHECK-NEXT: vmovsd %xmm0, {{[0-9]+}}(%rsp) # 8-byte Spill
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; CHECK-NEXT: vmovaps %xmm8, %xmm0
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; CHECK-NEXT: vmovaps %xmm0, {{[0-9]+}}(%rsp) # 16-byte Spill
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; CHECK-NEXT: vmovsd %xmm0, {{[0-9]+}}(%rsp) # 8-byte Spill
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; CHECK-NEXT: vextractf32x4 $3, %zmm7, %xmm0
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; CHECK-NEXT: vmovaps %xmm0, {{[0-9]+}}(%rsp) # 16-byte Spill
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; CHECK-NEXT: vmovsd %xmm0, {{[0-9]+}}(%rsp) # 8-byte Spill
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; CHECK-NEXT: vextractf32x4 $2, %zmm7, %xmm0
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; CHECK-NEXT: vmovaps %xmm0, {{[0-9]+}}(%rsp) # 16-byte Spill
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; CHECK-NEXT: vmovsd %xmm0, {{[0-9]+}}(%rsp) # 8-byte Spill
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; CHECK-NEXT: vmovaps %xmm7, %xmm0
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; CHECK-NEXT: vmovaps %xmm0, {{[0-9]+}}(%rsp) # 16-byte Spill
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; CHECK-NEXT: vpermilpd {{.*#+}} xmm3 = xmm3[1,0]
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; CHECK-NEXT: vpermilpd {{.*#+}} xmm5 = xmm5[1,0]
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; CHECK-NEXT: vpermilpd {{.*#+}} xmm11 = xmm11[1,0]
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; CHECK-NEXT: vpermilpd {{.*#+}} xmm13 = xmm13[1,0]
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; CHECK-NEXT: # kill: %YMM10<def> %YMM10<kill> %ZMM10<kill>
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; CHECK-NEXT: vextractf128 $1, %ymm10, %xmm10
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; CHECK-NEXT: vmovsd %xmm0, {{[0-9]+}}(%rsp) # 8-byte Spill
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; CHECK-NEXT: vmovaps %xmm10, %xmm0
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; CHECK-NEXT: vpermilpd {{.*#+}} xmm15 = xmm15[1,0]
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; CHECK-NEXT: vmovsd %xmm0, {{[0-9]+}}(%rsp) # 8-byte Spill
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; CHECK-NEXT: vmovaps {{[0-9]+}}(%rsp), %xmm0 # 16-byte Reload
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; CHECK-NEXT: vpermilpd {{.*#+}} xmm0 = xmm0[1,0]
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; CHECK-NEXT: vmovsd %xmm0, {{[0-9]+}}(%rsp) # 8-byte Spill
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; CHECK-NEXT: vmovaps {{[0-9]+}}(%rsp), %xmm0 # 16-byte Reload
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; CHECK-NEXT: vpermilpd {{.*#+}} xmm0 = xmm0[1,0]
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; CHECK-NEXT: # kill: %YMM9<def> %YMM9<kill> %ZMM9<kill>
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; CHECK-NEXT: vextractf128 $1, %ymm9, %xmm9
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; CHECK-NEXT: vmovsd %xmm0, {{[0-9]+}}(%rsp) # 8-byte Spill
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; CHECK-NEXT: vmovaps %xmm9, %xmm0
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; CHECK-NEXT: vmovsd %xmm0, {{[0-9]+}}(%rsp) # 8-byte Spill
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; CHECK-NEXT: vmovaps {{[0-9]+}}(%rsp), %xmm0 # 16-byte Reload
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; CHECK-NEXT: vpermilpd {{.*#+}} xmm0 = xmm0[1,0]
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; CHECK-NEXT: vmovsd %xmm0, {{[0-9]+}}(%rsp) # 8-byte Spill
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; CHECK-NEXT: vmovaps {{[0-9]+}}(%rsp), %xmm0 # 16-byte Reload
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; CHECK-NEXT: vpermilpd {{.*#+}} xmm0 = xmm0[1,0]
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; CHECK-NEXT: vmovsd %xmm0, {{[0-9]+}}(%rsp) # 8-byte Spill
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; CHECK-NEXT: vmovaps {{[0-9]+}}(%rsp), %xmm0 # 16-byte Reload
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; CHECK-NEXT: vpermilpd {{.*#+}} xmm0 = xmm0[1,0]
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; CHECK-NEXT: # kill: %YMM8<def> %YMM8<kill> %ZMM8<kill>
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; CHECK-NEXT: vextractf128 $1, %ymm8, %xmm8
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; CHECK-NEXT: vmovsd %xmm0, {{[0-9]+}}(%rsp) # 8-byte Spill
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; CHECK-NEXT: vmovaps %xmm8, %xmm0
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; CHECK-NEXT: vmovsd %xmm0, {{[0-9]+}}(%rsp) # 8-byte Spill
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; CHECK-NEXT: vmovaps {{[0-9]+}}(%rsp), %xmm0 # 16-byte Reload
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; CHECK-NEXT: vpermilpd {{.*#+}} xmm0 = xmm0[1,0]
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; CHECK-NEXT: vmovsd %xmm0, {{[0-9]+}}(%rsp) # 8-byte Spill
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; CHECK-NEXT: vmovaps {{[0-9]+}}(%rsp), %xmm0 # 16-byte Reload
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; CHECK-NEXT: vpermilpd {{.*#+}} xmm0 = xmm0[1,0]
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; CHECK-NEXT: vmovsd %xmm0, {{[0-9]+}}(%rsp) # 8-byte Spill
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; CHECK-NEXT: vmovaps {{[0-9]+}}(%rsp), %xmm0 # 16-byte Reload
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; CHECK-NEXT: vpermilpd {{.*#+}} xmm0 = xmm0[1,0]
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; CHECK-NEXT: # kill: %YMM7<def> %YMM7<kill> %ZMM7<kill>
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; CHECK-NEXT: vextractf128 $1, %ymm7, %xmm7
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; CHECK-NEXT: vmovsd %xmm0, {{[0-9]+}}(%rsp) # 8-byte Spill
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; CHECK-NEXT: vmovaps %xmm7, %xmm0
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; CHECK-NEXT: vmovsd %xmm0, {{[0-9]+}}(%rsp) # 8-byte Spill
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; CHECK-NEXT: vmovaps {{[0-9]+}}(%rsp), %xmm0 # 16-byte Reload
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; CHECK-NEXT: vpermilpd {{.*#+}} xmm0 = xmm0[1,0]
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; CHECK-NEXT: vpermilpd {{.*#+}} xmm10 = xmm10[1,0]
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; CHECK-NEXT: vpermilpd {{.*#+}} xmm9 = xmm9[1,0]
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; CHECK-NEXT: vpermilpd {{.*#+}} xmm8 = xmm8[1,0]
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; CHECK-NEXT: vpermilpd {{.*#+}} xmm7 = xmm7[1,0]
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; CHECK-NEXT: vmovsd %xmm0, {{[0-9]+}}(%rsp) # 8-byte Spill
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; CHECK-NEXT: vmovsd {{[0-9]+}}(%rsp), %xmm0 # 8-byte Reload
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; CHECK-NEXT: # xmm0 = mem[0],zero
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; CHECK-NEXT: vmovsd %xmm0, {{[0-9]+}}(%rsp) # 8-byte Spill
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; CHECK-NEXT: vmovsd {{[0-9]+}}(%rsp), %xmm0 # 8-byte Reload
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; CHECK-NEXT: # xmm0 = mem[0],zero
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; CHECK-NEXT: vmovsd %xmm0, {{[0-9]+}}(%rsp) # 8-byte Spill
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; CHECK-NEXT: vmovsd {{[0-9]+}}(%rsp), %xmm0 # 8-byte Reload
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; CHECK-NEXT: # xmm0 = mem[0],zero
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; CHECK-NEXT: vmovsd %xmm0, {{[0-9]+}}(%rsp) # 8-byte Spill
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; CHECK-NEXT: vmovsd {{[0-9]+}}(%rsp), %xmm0 # 8-byte Reload
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; CHECK-NEXT: # xmm0 = mem[0],zero
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; CHECK-NEXT: vmovsd %xmm0, {{[0-9]+}}(%rsp) # 8-byte Spill
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; CHECK-NEXT: vmovsd {{[0-9]+}}(%rsp), %xmm0 # 8-byte Reload
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; CHECK-NEXT: # xmm0 = mem[0],zero
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; CHECK-NEXT: vmovsd %xmm0, {{[0-9]+}}(%rsp) # 8-byte Spill
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; CHECK-NEXT: vmovsd {{[0-9]+}}(%rsp), %xmm0 # 8-byte Reload
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; CHECK-NEXT: # xmm0 = mem[0],zero
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; CHECK-NEXT: vmovsd %xmm0, {{[0-9]+}}(%rsp) # 8-byte Spill
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; CHECK-NEXT: vmovsd {{[0-9]+}}(%rsp), %xmm0 # 8-byte Reload
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; CHECK-NEXT: # xmm0 = mem[0],zero
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; CHECK-NEXT: vmovsd %xmm0, {{[0-9]+}}(%rsp) # 8-byte Spill
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; CHECK-NEXT: vmovsd {{[0-9]+}}(%rsp), %xmm0 # 8-byte Reload
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; CHECK-NEXT: # xmm0 = mem[0],zero
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; CHECK-NEXT: vmovsd %xmm0, {{[0-9]+}}(%rsp) # 8-byte Spill
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; CHECK-NEXT: vmovsd {{[0-9]+}}(%rsp), %xmm0 # 8-byte Reload
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; CHECK-NEXT: # xmm0 = mem[0],zero
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; CHECK-NEXT: vmovsd %xmm0, {{[0-9]+}}(%rsp) # 8-byte Spill
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; CHECK-NEXT: vmovsd {{[0-9]+}}(%rsp), %xmm0 # 8-byte Reload
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; CHECK-NEXT: # xmm0 = mem[0],zero
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; CHECK-NEXT: vmovsd %xmm0, {{[0-9]+}}(%rsp) # 8-byte Spill
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; CHECK-NEXT: vmovsd {{[0-9]+}}(%rsp), %xmm0 # 8-byte Reload
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; CHECK-NEXT: # xmm0 = mem[0],zero
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; CHECK-NEXT: vmovsd %xmm0, {{[0-9]+}}(%rsp) # 8-byte Spill
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; CHECK-NEXT: vmovsd {{[0-9]+}}(%rsp), %xmm0 # 8-byte Reload
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; CHECK-NEXT: # xmm0 = mem[0],zero
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; CHECK-NEXT: vmovsd %xmm0, {{[0-9]+}}(%rsp) # 8-byte Spill
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; CHECK-NEXT: vmovsd {{[0-9]+}}(%rsp), %xmm0 # 8-byte Reload
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; CHECK-NEXT: # xmm0 = mem[0],zero
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; CHECK-NEXT: vmovsd %xmm0, {{[0-9]+}}(%rsp) # 8-byte Spill
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; CHECK-NEXT: vmovsd {{[0-9]+}}(%rsp), %xmm0 # 8-byte Reload
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; CHECK-NEXT: # xmm0 = mem[0],zero
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; CHECK-NEXT: vmovsd %xmm0, {{[0-9]+}}(%rsp) # 8-byte Spill
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; CHECK-NEXT: vmovsd {{[0-9]+}}(%rsp), %xmm0 # 8-byte Reload
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; CHECK-NEXT: # xmm0 = mem[0],zero
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; CHECK-NEXT: vmovsd %xmm0, {{[0-9]+}}(%rsp) # 8-byte Spill
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; CHECK-NEXT: vmovsd {{[0-9]+}}(%rsp), %xmm0 # 8-byte Reload
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; CHECK-NEXT: # xmm0 = mem[0],zero
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; CHECK-NEXT: vmovsd %xmm0, {{[0-9]+}}(%rsp) # 8-byte Spill
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; CHECK-NEXT: vmovsd {{[0-9]+}}(%rsp), %xmm0 # 8-byte Reload
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; CHECK-NEXT: # xmm0 = mem[0],zero
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; CHECK-NEXT: vmovsd %xmm0, {{[0-9]+}}(%rsp) # 8-byte Spill
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; CHECK-NEXT: vmovsd {{[0-9]+}}(%rsp), %xmm0 # 8-byte Reload
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; CHECK-NEXT: # xmm0 = mem[0],zero
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; CHECK-NEXT: vmovsd %xmm0, {{[0-9]+}}(%rsp) # 8-byte Spill
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; CHECK-NEXT: vmovsd {{[0-9]+}}(%rsp), %xmm0 # 8-byte Reload
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; CHECK-NEXT: # xmm0 = mem[0],zero
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; CHECK-NEXT: vmovsd %xmm0, {{[0-9]+}}(%rsp) # 8-byte Spill
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; CHECK-NEXT: vmovsd {{[0-9]+}}(%rsp), %xmm0 # 8-byte Reload
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; CHECK-NEXT: # xmm0 = mem[0],zero
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; CHECK-NEXT: vmovsd %xmm0, {{[0-9]+}}(%rsp) # 8-byte Spill
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; CHECK-NEXT: vmovsd {{[0-9]+}}(%rsp), %xmm0 # 8-byte Reload
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; CHECK-NEXT: # xmm0 = mem[0],zero
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; CHECK-NEXT: vmovsd %xmm0, {{[0-9]+}}(%rsp) # 8-byte Spill
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; CHECK-NEXT: vmovsd {{[0-9]+}}(%rsp), %xmm0 # 8-byte Reload
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; CHECK-NEXT: # xmm0 = mem[0],zero
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; CHECK-NEXT: vmovsd %xmm0, {{[0-9]+}}(%rsp) # 8-byte Spill
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; CHECK-NEXT: vmovsd {{[0-9]+}}(%rsp), %xmm0 # 8-byte Reload
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; CHECK-NEXT: # xmm0 = mem[0],zero
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; CHECK-NEXT: vmovsd %xmm8, {{[0-9]+}}(%rsp) # 8-byte Spill
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; CHECK-NEXT: vmovsd %xmm13, {{[0-9]+}}(%rsp) # 8-byte Spill
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; CHECK-NEXT: vmovsd %xmm1, {{[0-9]+}}(%rsp) # 8-byte Spill
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; CHECK-NEXT: vmovsd %xmm14, {{[0-9]+}}(%rsp) # 8-byte Spill
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; CHECK-NEXT: vmovsd %xmm2, {{[0-9]+}}(%rsp) # 8-byte Spill
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; CHECK-NEXT: vmovsd %xmm4, {{[0-9]+}}(%rsp) # 8-byte Spill
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; CHECK-NEXT: vmovsd %xmm9, {{[0-9]+}}(%rsp) # 8-byte Spill
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; CHECK-NEXT: vmovsd %xmm10, {{[0-9]+}}(%rsp) # 8-byte Spill
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; CHECK-NEXT: vmovsd %xmm15, {{[0-9]+}}(%rsp) # 8-byte Spill
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; CHECK-NEXT: vmovsd %xmm11, {{[0-9]+}}(%rsp) # 8-byte Spill
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; CHECK-NEXT: vmovsd %xmm3, {{[0-9]+}}(%rsp) # 8-byte Spill
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; CHECK-NEXT: vmovsd %xmm6, {{[0-9]+}}(%rsp) # 8-byte Spill
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; CHECK-NEXT: vmovsd %xmm5, {{[0-9]+}}(%rsp) # 8-byte Spill
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; CHECK-NEXT: vmovsd %xmm12, {{[0-9]+}}(%rsp) # 8-byte Spill
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; CHECK-NEXT: vmovsd %xmm0, {{[0-9]+}}(%rsp) # 8-byte Spill
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; CHECK-NEXT: vmovsd %xmm7, {{[0-9]+}}(%rsp) # 8-byte Spill
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; CHECK-NEXT: movq %rbp, %rsp
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; CHECK-NEXT: popq %rbp
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; CHECK-NEXT: vzeroupper
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; CHECK-NEXT: retq
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entry:
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%v = call fastcc <38 x double> @test()
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%v.0 = extractelement <38 x double> %v, i32 0
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ret void
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}
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20
test/CodeGen/X86/pr34657.ll
Normal file
20
test/CodeGen/X86/pr34657.ll
Normal file
@ -0,0 +1,20 @@
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc %s -O2 -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512bw -o - | FileCheck %s
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define <112 x i8> @pr34657() local_unnamed_addr {
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; CHECK-LABEL: pr34657
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; CHECK: # BB#0: # %entry
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; CHECK-NEXT: vmovups (%rax), %xmm0
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; CHECK-NEXT: vmovups (%rax), %ymm1
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; CHECK-NEXT: vinsertf64x4 $1, %ymm0, %zmm1, %zmm0
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; CHECK-NEXT: vmovups (%rax), %zmm2
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; CHECK-NEXT: vmovaps %ymm1, 64(%rdi)
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; CHECK-NEXT: vmovaps %zmm2, (%rdi)
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; CHECK-NEXT: vextractf32x4 $2, %zmm0, 96(%rdi)
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; CHECK-NEXT: movq %rdi, %rax
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; CHECK-NEXT: vzeroupper
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; CHECK-NEXT: retq
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entry:
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%wide.vec51 = load <112 x i8>, <112 x i8>* undef, align 2
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ret <112 x i8> %wide.vec51
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}
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