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Cross-class joining is winning.
Remove the heuristic for disabling cross-class joins. The greedy register allocator can handle the narrow register classes, and when it splits a live range, it can pick a larger register class. Benchmarks were unaffected by this change. <rdar://problem/11302212> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155551 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -149,14 +149,6 @@ namespace {
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/// shouldJoinPhys - Return true if a physreg copy should be joined.
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bool shouldJoinPhys(CoalescerPair &CP);
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/// isWinToJoinCrossClass - Return true if it's profitable to coalesce
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/// two virtual registers from different register classes.
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bool isWinToJoinCrossClass(unsigned SrcReg,
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unsigned DstReg,
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const TargetRegisterClass *SrcRC,
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const TargetRegisterClass *DstRC,
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const TargetRegisterClass *NewRC);
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/// UpdateRegDefsUses - Replace all defs and uses of SrcReg to DstReg and
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/// update the subregister number if it is not zero. If DstReg is a
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/// physical register and the existing subregister number of the def / use
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@ -1052,56 +1044,6 @@ bool RegisterCoalescer::shouldJoinPhys(CoalescerPair &CP) {
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return true;
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}
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/// isWinToJoinCrossClass - Return true if it's profitable to coalesce
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/// two virtual registers from different register classes.
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bool
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RegisterCoalescer::isWinToJoinCrossClass(unsigned SrcReg,
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unsigned DstReg,
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const TargetRegisterClass *SrcRC,
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const TargetRegisterClass *DstRC,
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const TargetRegisterClass *NewRC) {
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unsigned NewRCCount = RegClassInfo.getNumAllocatableRegs(NewRC);
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// This heuristics is good enough in practice, but it's obviously not *right*.
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// 4 is a magic number that works well enough for x86, ARM, etc. It filter
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// out all but the most restrictive register classes.
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if (NewRCCount > 4 ||
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// Early exit if the function is fairly small, coalesce aggressively if
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// that's the case. For really special register classes with 3 or
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// fewer registers, be a bit more careful.
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(LIS->getFuncInstructionCount() / NewRCCount) < 8)
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return true;
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LiveInterval &SrcInt = LIS->getInterval(SrcReg);
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LiveInterval &DstInt = LIS->getInterval(DstReg);
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unsigned SrcSize = LIS->getApproximateInstructionCount(SrcInt);
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unsigned DstSize = LIS->getApproximateInstructionCount(DstInt);
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// Coalesce aggressively if the intervals are small compared to the number of
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// registers in the new class. The number 4 is fairly arbitrary, chosen to be
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// less aggressive than the 8 used for the whole function size.
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const unsigned ThresSize = 4 * NewRCCount;
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if (SrcSize <= ThresSize && DstSize <= ThresSize)
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return true;
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// Estimate *register use density*. If it doubles or more, abort.
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unsigned SrcUses = std::distance(MRI->use_nodbg_begin(SrcReg),
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MRI->use_nodbg_end());
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unsigned DstUses = std::distance(MRI->use_nodbg_begin(DstReg),
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MRI->use_nodbg_end());
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unsigned NewUses = SrcUses + DstUses;
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unsigned NewSize = SrcSize + DstSize;
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if (SrcRC != NewRC && SrcSize > ThresSize) {
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unsigned SrcRCCount = RegClassInfo.getNumAllocatableRegs(SrcRC);
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if (NewUses*SrcSize*SrcRCCount > 2*SrcUses*NewSize*NewRCCount)
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return false;
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}
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if (DstRC != NewRC && DstSize > ThresSize) {
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unsigned DstRCCount = RegClassInfo.getNumAllocatableRegs(DstRC);
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if (NewUses*DstSize*DstRCCount > 2*DstUses*NewSize*NewRCCount)
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return false;
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}
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return true;
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}
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/// JoinCopy - Attempt to join intervals corresponding to SrcReg/DstReg,
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/// which are the src/dst of the copy instruction CopyMI. This returns true
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@ -1159,14 +1101,6 @@ bool RegisterCoalescer::JoinCopy(MachineInstr *CopyMI, bool &Again) {
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DEBUG(dbgs() << "\tCross-class joins disabled.\n");
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return false;
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}
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if (!isWinToJoinCrossClass(CP.getSrcReg(), CP.getDstReg(),
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MRI->getRegClass(CP.getSrcReg()),
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MRI->getRegClass(CP.getDstReg()),
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CP.getNewRC())) {
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DEBUG(dbgs() << "\tAvoid coalescing to constrained register class.\n");
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Again = true; // May be possible to coalesce later.
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return false;
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}
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}
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// When possible, let DstReg be the larger interval.
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