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Move LiveIntervals.h to lib/CodeGen since it shouldn't be exposed to other parts of the compiler
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11719 91177308-0d34-0410-b5e6-96231b3b80d8
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Alkis Evlogimenos
parent
986618ebc7
commit
a2f6a408dc
@ -1,213 +0,0 @@
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//===-- llvm/CodeGen/LiveInterval.h - Live Interval Analysis ----*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file was developed by the LLVM research group and is distributed under
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// the University of Illinois Open Source License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file implements the LiveInterval analysis pass. Given some
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// numbering of each the machine instructions (in this implemention
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// depth-first order) an interval [i, j) is said to be a live interval
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// for register v if there is no instruction with number j' > j such
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// that v is live at j' abd there is no instruction with number i' < i
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// such that v is live at i'. In this implementation intervals can
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// have holes, i.e. an interval might look like [1,20), [50,65),
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// [1000,1001)
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_CODEGEN_LIVEINTERVALS_H
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#define LLVM_CODEGEN_LIVEINTERVALS_H
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#include "llvm/CodeGen/MachineFunctionPass.h"
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#include <list>
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namespace llvm {
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class LiveVariables;
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class MRegisterInfo;
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class LiveIntervals : public MachineFunctionPass
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{
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public:
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struct Interval {
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typedef std::pair<unsigned, unsigned> Range;
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typedef std::vector<Range> Ranges;
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unsigned reg; // the register of this interval
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float weight; // weight of this interval (number of uses
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// * 10^loopDepth)
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Ranges ranges; // the ranges in which this register is live
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Interval(unsigned r);
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bool empty() const { return ranges.empty(); }
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bool spilled() const;
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unsigned start() const {
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assert(!empty() && "empty interval for register");
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return ranges.front().first;
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}
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unsigned end() const {
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assert(!empty() && "empty interval for register");
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return ranges.back().second;
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}
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bool expiredAt(unsigned index) const {
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return end() <= (index + 1);
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}
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bool liveAt(unsigned index) const;
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bool overlaps(const Interval& other) const;
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void addRange(unsigned start, unsigned end);
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void join(const Interval& other);
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private:
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Ranges::iterator mergeRangesForward(Ranges::iterator it);
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Ranges::iterator mergeRangesBackward(Ranges::iterator it);
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};
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struct StartPointComp {
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bool operator()(const Interval& lhs, const Interval& rhs) {
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return lhs.ranges.front().first < rhs.ranges.front().first;
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}
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};
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struct EndPointComp {
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bool operator()(const Interval& lhs, const Interval& rhs) {
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return lhs.ranges.back().second < rhs.ranges.back().second;
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}
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};
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typedef std::list<Interval> Intervals;
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private:
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MachineFunction* mf_;
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const TargetMachine* tm_;
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const MRegisterInfo* mri_;
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MachineBasicBlock* currentMbb_;
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MachineBasicBlock::iterator currentInstr_;
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LiveVariables* lv_;
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typedef std::map<unsigned, MachineBasicBlock*> MbbIndex2MbbMap;
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MbbIndex2MbbMap mbbi2mbbMap_;
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typedef std::map<MachineInstr*, unsigned> Mi2IndexMap;
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Mi2IndexMap mi2iMap_;
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typedef std::vector<MachineInstr*> Index2MiMap;
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Index2MiMap i2miMap_;
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typedef std::map<unsigned, Intervals::iterator> Reg2IntervalMap;
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Reg2IntervalMap r2iMap_;
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typedef std::map<unsigned, unsigned> Reg2RegMap;
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Reg2RegMap r2rMap_;
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Intervals intervals_;
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public:
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struct InstrSlots
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{
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enum {
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LOAD = 0,
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USE = 1,
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DEF = 2,
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STORE = 3,
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NUM = 4,
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};
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};
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static unsigned getBaseIndex(unsigned index) {
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return index - (index % InstrSlots::NUM);
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}
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static unsigned getBoundaryIndex(unsigned index) {
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return getBaseIndex(index + InstrSlots::NUM - 1);
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}
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static unsigned getLoadIndex(unsigned index) {
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return getBaseIndex(index) + InstrSlots::LOAD;
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}
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static unsigned getUseIndex(unsigned index) {
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return getBaseIndex(index) + InstrSlots::USE;
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}
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static unsigned getDefIndex(unsigned index) {
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return getBaseIndex(index) + InstrSlots::DEF;
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}
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static unsigned getStoreIndex(unsigned index) {
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return getBaseIndex(index) + InstrSlots::STORE;
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}
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virtual void getAnalysisUsage(AnalysisUsage &AU) const;
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virtual void releaseMemory();
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/// runOnMachineFunction - pass entry point
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virtual bool runOnMachineFunction(MachineFunction&);
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Interval& getInterval(unsigned reg) {
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assert(r2iMap_.count(reg)&& "Interval does not exist for register");
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return *r2iMap_.find(reg)->second;
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}
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/// getInstructionIndex - returns the base index of instr
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unsigned getInstructionIndex(MachineInstr* instr) const;
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/// getInstructionFromIndex - given an index in any slot of an
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/// instruction return a pointer the instruction
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MachineInstr* getInstructionFromIndex(unsigned index) const;
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Intervals& getIntervals() { return intervals_; }
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void updateSpilledInterval(Interval& i, int slot);
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private:
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/// computeIntervals - compute live intervals
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void computeIntervals();
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/// joinIntervals - join compatible live intervals
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void joinIntervals();
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/// handleRegisterDef - update intervals for a register def
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/// (calls handlePhysicalRegisterDef and
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/// handleVirtualRegisterDef)
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void handleRegisterDef(MachineBasicBlock* mbb,
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MachineBasicBlock::iterator mi,
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unsigned reg);
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/// handleVirtualRegisterDef - update intervals for a virtual
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/// register def
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void handleVirtualRegisterDef(MachineBasicBlock* mbb,
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MachineBasicBlock::iterator mi,
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unsigned reg);
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/// handlePhysicalRegisterDef - update intervals for a
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/// physical register def
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void handlePhysicalRegisterDef(MachineBasicBlock* mbb,
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MachineBasicBlock::iterator mi,
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unsigned reg);
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bool overlapsAliases(const Interval& lhs, const Interval& rhs) const;
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/// rep - returns the representative of this register
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unsigned rep(unsigned reg);
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void printRegName(unsigned reg) const;
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};
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inline bool operator==(const LiveIntervals::Interval& lhs,
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const LiveIntervals::Interval& rhs) {
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return lhs.reg == rhs.reg;
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}
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std::ostream& operator<<(std::ostream& os,
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const LiveIntervals::Interval& li);
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} // End llvm namespace
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#endif
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@ -16,7 +16,6 @@
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//===----------------------------------------------------------------------===//
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#define DEBUG_TYPE "liveintervals"
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#include "llvm/CodeGen/LiveIntervals.h"
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#include "llvm/Analysis/LoopInfo.h"
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#include "llvm/CodeGen/LiveVariables.h"
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#include "llvm/CodeGen/MachineFrameInfo.h"
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@ -31,6 +30,7 @@
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#include "Support/Debug.h"
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#include "Support/Statistic.h"
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#include "Support/STLExtras.h"
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#include "LiveIntervals.h"
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#include <cmath>
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#include <iostream>
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#include <limits>
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@ -12,7 +12,6 @@
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//===----------------------------------------------------------------------===//
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#define DEBUG_TYPE "regalloc"
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#include "llvm/Function.h"
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#include "llvm/CodeGen/LiveIntervals.h"
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#include "llvm/CodeGen/LiveVariables.h"
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#include "llvm/CodeGen/MachineFrameInfo.h"
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#include "llvm/CodeGen/MachineFunctionPass.h"
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@ -27,6 +26,7 @@
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#include "Support/DepthFirstIterator.h"
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#include "Support/Statistic.h"
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#include "Support/STLExtras.h"
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#include "LiveIntervals.h"
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#include <algorithm>
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using namespace llvm;
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@ -562,6 +562,8 @@ void RA::assignRegOrStackSlotAtInterval(IntervalPtrs::value_type cur)
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// otherwise we spill all intervals aliasing the register with
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// minimum weight, rollback to the interval with the earliest
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// start point and let the linear scan algorithm run again
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assert(MRegisterInfo::isPhysicalRegister(minReg) &&
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"did not choose a register to spill?");
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std::vector<bool> toSpill(mri_->getNumRegs(), false);
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toSpill[minReg] = true;
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for (const unsigned* as = mri_->getAliasSet(minReg); *as; ++as)
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