From a2f6f94b74b7660cdf594ee9c538e4bae2978c71 Mon Sep 17 00:00:00 2001
From: Michael Liao <michael.liao@intel.com>
Date: Wed, 4 Dec 2013 17:44:22 +0000
Subject: [PATCH] [X86] Check YMM31/ZMM31 as well

- No test case as there's no calling convention preserve YMM31/ZMM31 only



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196391 91177308-0d34-0410-b5e6-96231b3b80d8
---
 lib/Target/X86/X86VZeroUpper.cpp | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/lib/Target/X86/X86VZeroUpper.cpp b/lib/Target/X86/X86VZeroUpper.cpp
index a9446529494..66ae9c2d7f9 100644
--- a/lib/Target/X86/X86VZeroUpper.cpp
+++ b/lib/Target/X86/X86VZeroUpper.cpp
@@ -122,11 +122,11 @@ static bool checkFnHasLiveInYmm(MachineRegisterInfo &MRI) {
 }
 
 static bool clobbersAllYmmRegs(const MachineOperand &MO) {
-  for (unsigned reg = X86::YMM0; reg < X86::YMM31; ++reg) {
+  for (unsigned reg = X86::YMM0; reg <= X86::YMM31; ++reg) {
     if (!MO.clobbersPhysReg(reg))
       return false;
   }
-  for (unsigned reg = X86::ZMM0; reg < X86::ZMM31; ++reg) {
+  for (unsigned reg = X86::ZMM0; reg <= X86::ZMM31; ++reg) {
     if (!MO.clobbersPhysReg(reg))
       return false;
   }
@@ -155,11 +155,11 @@ static bool clobbersAnyYmmReg(MachineInstr *MI) {
     const MachineOperand &MO = MI->getOperand(i);
     if (!MO.isRegMask())
       continue;
-    for (unsigned reg = X86::YMM0; reg < X86::YMM31; ++reg) {
+    for (unsigned reg = X86::YMM0; reg <= X86::YMM31; ++reg) {
       if (MO.clobbersPhysReg(reg))
         return true;
     }
-    for (unsigned reg = X86::ZMM0; reg < X86::ZMM31; ++reg) {
+    for (unsigned reg = X86::ZMM0; reg <= X86::ZMM31; ++reg) {
       if (MO.clobbersPhysReg(reg))
         return true;
     }