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[LoopSimplifyCFG] Form LCSSA when a parent loop becomes a sibling
During the transforms in LoopSimplifyCFG, when we remove a dead exiting edge, the parent loop may stop being reachable from the child loop, and therefore they become siblings. If the former child loop had uses of some values from its former parent loop, now such uses will require LCSSA Phis, even if they weren't needed before. So we must form LCSSA for all loops that stopped being ancestors of the current loop in this case. Differential Revision: https://reviews.llvm.org/D56144 Reviewed By: fedor.sergeev git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351434 91177308-0d34-0410-b5e6-96231b3b80d8
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@@ -379,6 +379,15 @@ private:
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StillReachable->addChildLoop(&L);
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else
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LI.addTopLevelLoop(&L);
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// Some values from loops in [OuterLoop, StillReachable) could be used
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// in the current loop. Now it is not their child anymore, so such uses
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// require LCSSA Phis.
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Loop *FixLCSSALoop = OuterLoop;
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while (FixLCSSALoop->getParentLoop() != StillReachable)
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FixLCSSALoop = FixLCSSALoop->getParentLoop();
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assert(FixLCSSALoop && "Should be a loop!");
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formLCSSARecursively(*FixLCSSALoop, DT, &LI, &SE);
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}
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}
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}
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@@ -3,9 +3,6 @@
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; RUN: opt -S -enable-loop-simplifycfg-term-folding=true -loop-simplifycfg -verify-loop-info -verify-dom-info -verify-loop-lcssa < %s | FileCheck %s
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; RUN: opt -S -enable-loop-simplifycfg-term-folding=true -passes='require<domtree>,loop(simplify-cfg)' -verify-loop-info -verify-dom-info -verify-loop-lcssa < %s | FileCheck %s
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; RUN: opt -S -enable-loop-simplifycfg-term-folding=true -loop-simplifycfg -enable-mssa-loop-dependency=true -verify-memoryssa -verify-loop-info -verify-dom-info -verify-loop-lcssa < %s | FileCheck %s
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; XFAIL: *
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; test_01 is currently failing because the loop is not in LCSSA form after the
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; transform.
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target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
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@@ -56,6 +53,24 @@ if.end.8: ; preds = %if.end.7
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}
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define void @test_01() {
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; CHECK-LABEL: @test_01(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: br label [[FOR_COND:%.*]]
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; CHECK: for.cond.loopexit:
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; CHECK-NEXT: br label [[FOR_COND]]
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; CHECK: for.cond:
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; CHECK-NEXT: [[INC41_LCSSA3:%.*]] = phi i16 [ undef, [[FOR_COND_LOOPEXIT:%.*]] ], [ undef, [[ENTRY:%.*]] ]
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; CHECK-NEXT: switch i32 0, label [[FOR_COND_SPLIT:%.*]] [
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; CHECK-NEXT: i32 1, label [[FOR_COND_LOOPEXIT]]
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; CHECK-NEXT: ]
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; CHECK: for.cond-split:
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; CHECK-NEXT: [[INC41_LCSSA3_LCSSA:%.*]] = phi i16 [ [[INC41_LCSSA3]], [[FOR_COND]] ]
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; CHECK-NEXT: br label [[WHILE_COND:%.*]]
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; CHECK: while.cond:
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; CHECK-NEXT: [[INC41:%.*]] = phi i16 [ [[INC4:%.*]], [[WHILE_COND]] ], [ [[INC41_LCSSA3_LCSSA]], [[FOR_COND_SPLIT]] ]
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; CHECK-NEXT: [[INC4]] = add nsw i16 [[INC41]], 1
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; CHECK-NEXT: br label [[WHILE_COND]]
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;
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entry:
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br label %for.cond
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