mirror of
https://github.com/RPCS3/llvm.git
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Updating VC++ project.
Adding one include file and correct one declaration from class to struct in order to make llvm compile on VC2005. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55279 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Cedric Venet
parent
01571ef1e9
commit
a3f343f4cd
@ -36,7 +36,7 @@ class TypeSymbolTable;
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template<typename ValueTy> class StringMapEntry;
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typedef StringMapEntry<Value*> ValueName;
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class raw_ostream;
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class AssemblyAnnotationWriter;
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struct AssemblyAnnotationWriter;
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//===----------------------------------------------------------------------===//
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// Value Class
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@ -26,6 +26,7 @@
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#if defined(_MSC_VER)
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#include <io.h>
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#include <fcntl.h>
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#ifndef STDIN_FILENO
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# define STDIN_FILENO 0
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#endif
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@ -88,6 +88,73 @@
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Name="VCPostBuildEventTool"
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/>
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</Configuration>
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<Configuration
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Name="Release|Win32"
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OutputDirectory="$(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)"
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IntermediateDirectory="$(PlatformName)\$(ConfigurationName)"
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ConfigurationType="4"
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InheritedPropertySheets="$(VCInstallDir)VCProjectDefaults\UpgradeFromVC71.vsprops;..\common.vsprops"
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CharacterSet="2"
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>
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<Tool
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Name="VCPreBuildEventTool"
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/>
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<Tool
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Name="VCCustomBuildTool"
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/>
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<Tool
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Name="VCXMLDataGeneratorTool"
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/>
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<Tool
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Name="VCWebServiceProxyGeneratorTool"
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/>
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<Tool
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Name="VCMIDLTool"
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/>
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<Tool
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Name="VCCLCompilerTool"
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AdditionalIncludeDirectories="..\..\include;.."
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PreprocessorDefinitions="_CRT_SECURE_NO_DEPRECATE;_CRT_SECURE_NO_WARNINGS;_SCL_SECURE_NO_WARNINGS;_CRT_NONSTDC_NO_WARNINGS;WIN32;NDEBUG;_LIB;__STDC_LIMIT_MACROS"
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StringPooling="true"
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RuntimeLibrary="2"
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ForceConformanceInForLoopScope="true"
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RuntimeTypeInfo="true"
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UsePrecompiledHeader="0"
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ProgramDataBaseFileName="$(OutDir)\$(ProjectName).pdb"
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WarningLevel="3"
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Detect64BitPortabilityProblems="false"
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DebugInformationFormat="3"
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DisableSpecificWarnings="4355,4146,4800"
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/>
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<Tool
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Name="VCManagedResourceCompilerTool"
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/>
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<Tool
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Name="VCResourceCompilerTool"
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/>
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<Tool
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Name="VCPreLinkEventTool"
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/>
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<Tool
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Name="VCLibrarianTool"
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OutputFile="$(OutDir)/CodeGen.lib"
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/>
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<Tool
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Name="VCALinkTool"
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/>
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<Tool
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Name="VCXDCMakeTool"
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/>
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<Tool
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Name="VCBscMakeTool"
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/>
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<Tool
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Name="VCFxCopTool"
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/>
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<Tool
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Name="VCPostBuildEventTool"
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/>
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</Configuration>
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<Configuration
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Name="Debug|x64"
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OutputDirectory="$(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)"
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@ -160,73 +227,6 @@
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Name="VCPostBuildEventTool"
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/>
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</Configuration>
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<Configuration
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Name="Release|Win32"
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OutputDirectory="$(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)"
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IntermediateDirectory="$(PlatformName)\$(ConfigurationName)"
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ConfigurationType="4"
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InheritedPropertySheets="$(VCInstallDir)VCProjectDefaults\UpgradeFromVC71.vsprops;..\common.vsprops"
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CharacterSet="2"
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>
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<Tool
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Name="VCPreBuildEventTool"
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/>
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<Tool
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Name="VCCustomBuildTool"
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/>
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<Tool
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Name="VCXMLDataGeneratorTool"
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/>
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<Tool
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Name="VCWebServiceProxyGeneratorTool"
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/>
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<Tool
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Name="VCMIDLTool"
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/>
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<Tool
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Name="VCCLCompilerTool"
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AdditionalIncludeDirectories="..\..\include;.."
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PreprocessorDefinitions="_CRT_SECURE_NO_DEPRECATE;_CRT_SECURE_NO_WARNINGS;_SCL_SECURE_NO_WARNINGS;_CRT_NONSTDC_NO_WARNINGS;WIN32;NDEBUG;_LIB;__STDC_LIMIT_MACROS"
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StringPooling="true"
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RuntimeLibrary="2"
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ForceConformanceInForLoopScope="true"
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RuntimeTypeInfo="true"
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UsePrecompiledHeader="0"
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ProgramDataBaseFileName="$(OutDir)\$(ProjectName).pdb"
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WarningLevel="3"
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Detect64BitPortabilityProblems="false"
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DebugInformationFormat="3"
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DisableSpecificWarnings="4355,4146,4800"
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/>
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<Tool
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Name="VCManagedResourceCompilerTool"
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/>
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<Tool
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Name="VCResourceCompilerTool"
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/>
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<Tool
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Name="VCPreLinkEventTool"
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/>
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<Tool
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Name="VCLibrarianTool"
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OutputFile="$(OutDir)/CodeGen.lib"
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/>
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<Tool
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Name="VCALinkTool"
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/>
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<Tool
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Name="VCXDCMakeTool"
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/>
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<Tool
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Name="VCBscMakeTool"
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/>
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<Tool
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Name="VCFxCopTool"
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/>
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<Tool
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Name="VCPostBuildEventTool"
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/>
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</Configuration>
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<Configuration
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Name="Release|x64"
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OutputDirectory="$(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)"
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@ -503,6 +503,10 @@
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RelativePath="..\..\lib\CodeGen\SelectionDAG\DAGCombiner.cpp"
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>
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</File>
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<File
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RelativePath="..\..\lib\CodeGen\SelectionDAG\FastISel.cpp"
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>
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</File>
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<File
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RelativePath="..\..\lib\CodeGen\SelectionDAG\LegalizeDAG.cpp"
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>
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@ -551,10 +555,6 @@
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RelativePath="..\..\lib\CodeGen\SelectionDAG\SelectionDAGPrinter.cpp"
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>
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</File>
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<File
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RelativePath="..\..\lib\CodeGen\SelectionDAG\SimpleBBISel.cpp"
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>
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</File>
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<File
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RelativePath="..\..\lib\CodeGen\SelectionDAG\TargetLowering.cpp"
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>
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@ -601,6 +601,10 @@
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RelativePath="..\..\lib\Transforms\Utils\InlineFunction.cpp"
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>
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</File>
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<File
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RelativePath="..\..\lib\Transforms\Utils\InstructionNamer.cpp"
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>
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</File>
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<File
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RelativePath="..\..\lib\Transforms\Utils\LCSSA.cpp"
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>
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@ -314,9 +314,9 @@
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<Tool
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Name="VCCustomBuildTool"
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Description="Performing TableGen Step"
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CommandLine="echo Building $(InputFileName) register names with tblgen
$(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-register-enums -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenRegisterNames.inc
echo Building $(InputFileName) register information header with tblgen
$(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-register-desc-header -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenRegisterInfo.h.inc
echo Building $(InputFileName) register information implementation with tblgen
$(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-register-desc -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenRegisterInfo.inc
echo Building $(InputFileName) instruction names with tblgen
$(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-instr-enums -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenInstrNames.inc
echo Building $(InputFileName) instruction information with tblgen
$(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-instr-desc -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenInstrInfo.inc
echo Building $(InputFileName) assembly writer with tblgen
$(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-asm-writer -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenAsmWriter.inc
echo Building $(InputFileName) assembly writer #1 with tblgen
$(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-asm-writer -asmwriternum=1 -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenAsmWriter1.inc
echo Building $(InputFileName) instruction selector implementation with tblgen
$(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-dag-isel -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenDAGISel.inc
echo Building $(InputFileName) subtarget information with tblgen
$(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-subtarget -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenSubtarget.inc
echo Building $(InputFileName) calling convention information with tblgen
$(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-callingconv -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenCallingConv.inc
"
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CommandLine="echo Building $(InputFileName) register names with tblgen
$(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-register-enums -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenRegisterNames.inc
echo Building $(InputFileName) register information header with tblgen
$(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-register-desc-header -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenRegisterInfo.h.inc
echo Building $(InputFileName) register information implementation with tblgen
$(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-register-desc -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenRegisterInfo.inc
echo Building $(InputFileName) instruction names with tblgen
$(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-instr-enums -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenInstrNames.inc
echo Building $(InputFileName) instruction information with tblgen
$(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-instr-desc -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenInstrInfo.inc
echo Building $(InputFileName) assembly writer with tblgen
$(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-asm-writer -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenAsmWriter.inc
echo Building $(InputFileName) assembly writer #1 with tblgen
$(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-asm-writer -asmwriternum=1 -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenAsmWriter1.inc
echo Building $(InputFileName) instruction selector implementation with tblgen
$(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-dag-isel -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenDAGISel.inc
echo Building $(InputFileName) subtarget information with tblgen
$(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-subtarget -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenSubtarget.inc
echo Building $(InputFileName) calling convention information with tblgen
$(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-callingconv -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenCallingConv.inc
echo Building $(InputFileName) Fast instruction selection with tblgen
$(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-fast-isel -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenFastISel.inc
"
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AdditionalDependencies="$(InputDir)X86InstrInfo.td;$(InputDir)X86RegisterInfo.td;$(InputDir)X86InstrFPStack.td;$(InputDir)X86InstrMMX.td;$(InputDir)X86InstrSSE.td;$(InputDir)X86CallingConv.td;$(InputDir)..\Target.td;$(InputDir)..\TargetSchedule.td;$(InputDir)..\TargetScheduleDAG.td;$(ProjectDir)..\$(IntDir)\TableGen.exe"
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Outputs="X86GenRegisterNames.inc;X86GenRegisterInfo.h.inc;X86GenRegisterInfo.inc;X86GenInstrNames.inc;X86GenInstrInfo.inc;X86GenAsmWriter.inc;X86GenAsmWriter1.inc;X86GenDAGISel.inc;X86GenSubtarget.inc;X86GenCallingConv.inc"
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Outputs="X86GenRegisterNames.inc;X86GenRegisterInfo.h.inc;X86GenRegisterInfo.inc;X86GenInstrNames.inc;X86GenInstrInfo.inc;X86GenAsmWriter.inc;X86GenAsmWriter1.inc;X86GenDAGISel.inc;X86GenSubtarget.inc;X86GenCallingConv.inc;X86GenFastISel.inc"
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/>
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</FileConfiguration>
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<FileConfiguration
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@ -325,9 +325,9 @@
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<Tool
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Name="VCCustomBuildTool"
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Description="Performing TableGen Step"
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CommandLine="echo Building $(InputFileName) register names with tblgen
$(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-register-enums -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenRegisterNames.inc
echo Building $(InputFileName) register information header with tblgen
$(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-register-desc-header -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenRegisterInfo.h.inc
echo Building $(InputFileName) register information implementation with tblgen
$(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-register-desc -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenRegisterInfo.inc
echo Building $(InputFileName) instruction names with tblgen
$(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-instr-enums -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenInstrNames.inc
echo Building $(InputFileName) instruction information with tblgen
$(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-instr-desc -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenInstrInfo.inc
echo Building $(InputFileName) assembly writer with tblgen
$(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-asm-writer -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenAsmWriter.inc
echo Building $(InputFileName) assembly writer #1 with tblgen
$(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-asm-writer -asmwriternum=1 -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenAsmWriter1.inc
echo Building $(InputFileName) instruction selector implementation with tblgen
$(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-dag-isel -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenDAGISel.inc
echo Building $(InputFileName) subtarget information with tblgen
$(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-subtarget -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenSubtarget.inc
echo Building $(InputFileName) calling convention information with tblgen
$(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-callingconv -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenCallingConv.inc
"
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CommandLine="echo Building $(InputFileName) register names with tblgen
$(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-register-enums -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenRegisterNames.inc
echo Building $(InputFileName) register information header with tblgen
$(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-register-desc-header -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenRegisterInfo.h.inc
echo Building $(InputFileName) register information implementation with tblgen
$(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-register-desc -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenRegisterInfo.inc
echo Building $(InputFileName) instruction names with tblgen
$(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-instr-enums -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenInstrNames.inc
echo Building $(InputFileName) instruction information with tblgen
$(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-instr-desc -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenInstrInfo.inc
echo Building $(InputFileName) assembly writer with tblgen
$(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-asm-writer -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenAsmWriter.inc
echo Building $(InputFileName) assembly writer #1 with tblgen
$(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-asm-writer -asmwriternum=1 -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenAsmWriter1.inc
echo Building $(InputFileName) instruction selector implementation with tblgen
$(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-dag-isel -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenDAGISel.inc
echo Building $(InputFileName) subtarget information with tblgen
$(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-subtarget -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenSubtarget.inc
echo Building $(InputFileName) calling convention information with tblgen
$(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-callingconv -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenCallingConv.inc
echo Building $(InputFileName) Fast instruction selection with tblgen
$(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-fast-isel -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenFastISel.inc
"
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AdditionalDependencies="$(InputDir)X86InstrInfo.td;$(InputDir)X86RegisterInfo.td;$(InputDir)X86InstrFPStack.td;$(InputDir)X86InstrMMX.td;$(InputDir)X86InstrSSE.td;$(InputDir)X86CallingConv.td;$(InputDir)..\Target.td;$(InputDir)..\TargetSchedule.td;$(InputDir)..\TargetScheduleDAG.td;$(ProjectDir)..\$(IntDir)\TableGen.exe"
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Outputs="X86GenRegisterNames.inc;X86GenRegisterInfo.h.inc;X86GenRegisterInfo.inc;X86GenInstrNames.inc;X86GenInstrInfo.inc;X86GenAsmWriter.inc;X86GenAsmWriter1.inc;X86GenDAGISel.inc;X86GenSubtarget.inc;X86GenCallingConv.inc"
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Outputs="X86GenRegisterNames.inc;X86GenRegisterInfo.h.inc;X86GenRegisterInfo.inc;X86GenInstrNames.inc;X86GenInstrInfo.inc;X86GenAsmWriter.inc;X86GenAsmWriter1.inc;X86GenDAGISel.inc;X86GenSubtarget.inc;X86GenCallingConv.inc;X86GenFastISel.inc"
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/>
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</FileConfiguration>
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<FileConfiguration
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@ -336,9 +336,9 @@
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<Tool
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Name="VCCustomBuildTool"
|
||||
Description="Performing TableGen Step"
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||||
CommandLine="echo Building $(InputFileName) register names with tblgen
$(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-register-enums -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenRegisterNames.inc
echo Building $(InputFileName) register information header with tblgen
$(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-register-desc-header -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenRegisterInfo.h.inc
echo Building $(InputFileName) register information implementation with tblgen
$(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-register-desc -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenRegisterInfo.inc
echo Building $(InputFileName) instruction names with tblgen
$(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-instr-enums -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenInstrNames.inc
echo Building $(InputFileName) instruction information with tblgen
$(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-instr-desc -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenInstrInfo.inc
echo Building $(InputFileName) assembly writer with tblgen
$(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-asm-writer -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenAsmWriter.inc
echo Building $(InputFileName) assembly writer #1 with tblgen
$(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-asm-writer -asmwriternum=1 -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenAsmWriter1.inc
echo Building $(InputFileName) instruction selector implementation with tblgen
$(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-dag-isel -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenDAGISel.inc
echo Building $(InputFileName) subtarget information with tblgen
$(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-subtarget -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenSubtarget.inc
echo Building $(InputFileName) calling convention information with tblgen
$(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-callingconv -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenCallingConv.inc
"
|
||||
CommandLine="echo Building $(InputFileName) register names with tblgen
$(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-register-enums -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenRegisterNames.inc
echo Building $(InputFileName) register information header with tblgen
$(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-register-desc-header -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenRegisterInfo.h.inc
echo Building $(InputFileName) register information implementation with tblgen
$(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-register-desc -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenRegisterInfo.inc
echo Building $(InputFileName) instruction names with tblgen
$(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-instr-enums -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenInstrNames.inc
echo Building $(InputFileName) instruction information with tblgen
$(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-instr-desc -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenInstrInfo.inc
echo Building $(InputFileName) assembly writer with tblgen
$(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-asm-writer -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenAsmWriter.inc
echo Building $(InputFileName) assembly writer #1 with tblgen
$(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-asm-writer -asmwriternum=1 -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenAsmWriter1.inc
echo Building $(InputFileName) instruction selector implementation with tblgen
$(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-dag-isel -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenDAGISel.inc
echo Building $(InputFileName) subtarget information with tblgen
$(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-subtarget -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenSubtarget.inc
echo Building $(InputFileName) calling convention information with tblgen
$(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-callingconv -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenCallingConv.inc
echo Building $(InputFileName) Fast instruction selection with tblgen
$(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-fast-isel -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenFastISel.inc
"
|
||||
AdditionalDependencies="$(InputDir)X86InstrInfo.td;$(InputDir)X86RegisterInfo.td;$(InputDir)X86InstrFPStack.td;$(InputDir)X86InstrMMX.td;$(InputDir)X86InstrSSE.td;$(InputDir)X86CallingConv.td;$(InputDir)..\Target.td;$(InputDir)..\TargetSchedule.td;$(InputDir)..\TargetScheduleDAG.td;$(ProjectDir)..\$(IntDir)\TableGen.exe"
|
||||
Outputs="X86GenRegisterNames.inc;X86GenRegisterInfo.h.inc;X86GenRegisterInfo.inc;X86GenInstrNames.inc;X86GenInstrInfo.inc;X86GenAsmWriter.inc;X86GenAsmWriter1.inc;X86GenDAGISel.inc;X86GenSubtarget.inc;X86GenCallingConv.inc"
|
||||
Outputs="X86GenRegisterNames.inc;X86GenRegisterInfo.h.inc;X86GenRegisterInfo.inc;X86GenInstrNames.inc;X86GenInstrInfo.inc;X86GenAsmWriter.inc;X86GenAsmWriter1.inc;X86GenDAGISel.inc;X86GenSubtarget.inc;X86GenCallingConv.inc;X86GenFastISel.inc"
|
||||
/>
|
||||
</FileConfiguration>
|
||||
<FileConfiguration
|
||||
@ -347,9 +347,9 @@
|
||||
<Tool
|
||||
Name="VCCustomBuildTool"
|
||||
Description="Performing TableGen Step"
|
||||
CommandLine="echo Building $(InputFileName) register names with tblgen
$(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-register-enums -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenRegisterNames.inc
echo Building $(InputFileName) register information header with tblgen
$(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-register-desc-header -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenRegisterInfo.h.inc
echo Building $(InputFileName) register information implementation with tblgen
$(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-register-desc -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenRegisterInfo.inc
echo Building $(InputFileName) instruction names with tblgen
$(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-instr-enums -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenInstrNames.inc
echo Building $(InputFileName) instruction information with tblgen
$(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-instr-desc -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenInstrInfo.inc
echo Building $(InputFileName) assembly writer with tblgen
$(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-asm-writer -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenAsmWriter.inc
echo Building $(InputFileName) assembly writer #1 with tblgen
$(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-asm-writer -asmwriternum=1 -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenAsmWriter1.inc
echo Building $(InputFileName) instruction selector implementation with tblgen
$(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-dag-isel -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenDAGISel.inc
echo Building $(InputFileName) subtarget information with tblgen
$(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-subtarget -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenSubtarget.inc
echo Building $(InputFileName) calling convention information with tblgen
$(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-callingconv -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenCallingConv.inc
"
|
||||
CommandLine="echo Building $(InputFileName) register names with tblgen
$(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-register-enums -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenRegisterNames.inc
echo Building $(InputFileName) register information header with tblgen
$(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-register-desc-header -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenRegisterInfo.h.inc
echo Building $(InputFileName) register information implementation with tblgen
$(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-register-desc -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenRegisterInfo.inc
echo Building $(InputFileName) instruction names with tblgen
$(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-instr-enums -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenInstrNames.inc
echo Building $(InputFileName) instruction information with tblgen
$(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-instr-desc -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenInstrInfo.inc
echo Building $(InputFileName) assembly writer with tblgen
$(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-asm-writer -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenAsmWriter.inc
echo Building $(InputFileName) assembly writer #1 with tblgen
$(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-asm-writer -asmwriternum=1 -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenAsmWriter1.inc
echo Building $(InputFileName) instruction selector implementation with tblgen
$(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-dag-isel -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenDAGISel.inc
echo Building $(InputFileName) subtarget information with tblgen
$(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-subtarget -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenSubtarget.inc
echo Building $(InputFileName) calling convention information with tblgen
$(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-callingconv -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenCallingConv.inc
echo Building $(InputFileName) Fast instruction selection with tblgen
$(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-fast-isel -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenFastISel.inc
"
|
||||
AdditionalDependencies="$(InputDir)X86InstrInfo.td;$(InputDir)X86RegisterInfo.td;$(InputDir)X86InstrFPStack.td;$(InputDir)X86InstrMMX.td;$(InputDir)X86InstrSSE.td;$(InputDir)X86CallingConv.td;$(InputDir)..\Target.td;$(InputDir)..\TargetSchedule.td;$(InputDir)..\TargetScheduleDAG.td;$(ProjectDir)..\$(IntDir)\TableGen.exe"
|
||||
Outputs="X86GenRegisterNames.inc;X86GenRegisterInfo.h.inc;X86GenRegisterInfo.inc;X86GenInstrNames.inc;X86GenInstrInfo.inc;X86GenAsmWriter.inc;X86GenAsmWriter1.inc;X86GenDAGISel.inc;X86GenSubtarget.inc;X86GenCallingConv.inc"
|
||||
Outputs="X86GenRegisterNames.inc;X86GenRegisterInfo.h.inc;X86GenRegisterInfo.inc;X86GenInstrNames.inc;X86GenInstrInfo.inc;X86GenAsmWriter.inc;X86GenAsmWriter1.inc;X86GenDAGISel.inc;X86GenSubtarget.inc;X86GenCallingConv.inc;X86GenFastISel.inc"
|
||||
/>
|
||||
</FileConfiguration>
|
||||
</File>
|
||||
@ -391,6 +391,14 @@
|
||||
RelativePath="..\..\lib\Target\X86\X86ELFWriterInfo.h"
|
||||
>
|
||||
</File>
|
||||
<File
|
||||
RelativePath="..\..\lib\Target\X86\X86FastISel.cpp"
|
||||
>
|
||||
</File>
|
||||
<File
|
||||
RelativePath="..\..\lib\Target\X86\X86FastISel.h"
|
||||
>
|
||||
</File>
|
||||
<File
|
||||
RelativePath="..\..\lib\Target\X86\X86FloatingPoint.cpp"
|
||||
>
|
||||
@ -557,6 +565,10 @@
|
||||
<Filter
|
||||
Name="Generated Tablegen Files"
|
||||
>
|
||||
<File
|
||||
RelativePath=".\X86GenFastISel.inc"
|
||||
>
|
||||
</File>
|
||||
<File
|
||||
RelativePath=".\X86GenAsmWriter.inc"
|
||||
>
|
||||
|
||||
Loading…
Reference in New Issue
Block a user