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Fix canClobberPhysRegDefs to check all SDNodes grouped together

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in an SUnit, instead of just the first one. This fix is needed
by some upcoming scheduler changes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67531 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Dan Gohman 2009-03-23 16:23:01 +00:00
parent 3974667c1a
commit a5c8ae233e
1 changed files with 19 additions and 14 deletions
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33
lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp
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@ -1199,21 +1199,26 @@ static bool canClobberPhysRegDefs(const SUnit *SuccSU, const SUnit *SU,
unsigned NumDefs = TII->get(N->getMachineOpcode()).getNumDefs();
const unsigned *ImpDefs = TII->get(N->getMachineOpcode()).getImplicitDefs();
assert(ImpDefs && "Caller should check hasPhysRegDefs");
const unsigned *SUImpDefs =
TII->get(SU->getNode()->getMachineOpcode()).getImplicitDefs();
if (!SUImpDefs)
return false;
for (unsigned i = NumDefs, e = N->getNumValues(); i != e; ++i) {
MVT VT = N->getValueType(i);
if (VT == MVT::Flag || VT == MVT::Other)
for (const SDNode *SUNode = SU->getNode(); SUNode;
SUNode = SUNode->getFlaggedNode()) {
if (!SUNode->isMachineOpcode())
continue;
if (!N->hasAnyUseOfValue(i))
continue;
unsigned Reg = ImpDefs[i - NumDefs];
for (;*SUImpDefs; ++SUImpDefs) {
unsigned SUReg = *SUImpDefs;
if (TRI->regsOverlap(Reg, SUReg))
return true;
const unsigned *SUImpDefs =
TII->get(SUNode->getMachineOpcode()).getImplicitDefs();
if (!SUImpDefs)
return false;
for (unsigned i = NumDefs, e = N->getNumValues(); i != e; ++i) {
MVT VT = N->getValueType(i);
if (VT == MVT::Flag || VT == MVT::Other)
continue;
if (!N->hasAnyUseOfValue(i))
continue;
unsigned Reg = ImpDefs[i - NumDefs];
for (;*SUImpDefs; ++SUImpDefs) {
unsigned SUReg = *SUImpDefs;
if (TRI->regsOverlap(Reg, SUReg))
return true;
}
}
}
return false;