RPCS3/llvm
1
0
Fork 0
mirror of https://github.com/RPCS3/llvm.git synced 2025-02-04 17:47:58 +00:00
Code Issues Actions Packages Projects Releases Wiki Activity

[GlobalISel][X86] Use correct AND instructions.

Browse Source 
AND8ri8 not supported in 64bit.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@307630 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Igor Breger 2017-07-11 08:04:51 +00:00
parent 0c2ce7e21d
commit a66d0850ca
2 changed files with 2 additions and 2 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
lib/Target/X86/X86InstructionSelector.cpp
View File

@ -642,7 +642,7 @@ bool X86InstructionSelector::selectZext(MachineInstr &I,
unsigned AndOpc;
if (DstTy == LLT::scalar(8))
AndOpc = X86::AND8ri8;
AndOpc = X86::AND8ri;
else if (DstTy == LLT::scalar(16))
AndOpc = X86::AND16ri8;
else if (DstTy == LLT::scalar(32))

2
test/CodeGen/X86/GlobalISel/select-ext.mir
View File

@ -51,7 +51,7 @@ registers:
- { id: 0, class: gpr, preferred-register: '' }
- { id: 1, class: gpr, preferred-register: '' }
# ALL: %0 = COPY %dil
# ALL-NEXT: %1 = AND8ri8 %0, 1, implicit-def %eflags
# ALL-NEXT: %1 = AND8ri %0, 1, implicit-def %eflags
# ALL-NEXT: %al = COPY %1
# ALL-NEXT: RET 0, implicit %al
body: |