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Add short descriptions of 'implicit' and 'parallel'.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72050 91177308-0d34-0410-b5e6-96231b3b80d8
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Evan Cheng 2009-05-18 22:14:45 +00:00
parent 6679ee4e80
commit a7185b21d8
1 changed files with 7 additions and 0 deletions
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docs/TableGenFundamentals.html
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@ -395,6 +395,13 @@ supported include:</p>
<dd>a dag value. The first element is required to be a record definition, the <dd>a dag value. The first element is required to be a record definition, the
remaining elements in the list may be arbitrary other values, including nested remaining elements in the list may be arbitrary other values, including nested
`<tt>dag</tt>' values.</dd> `<tt>dag</tt>' values.</dd>
<dt><tt>(implicit a)</tt></dt>
<dd>an implicitly defined physical register. This tells the dag instruction
selection emitter the input pattern's extra definitions matches implicit
physical register definitions.</dd>
<dt><tt>(parallel (a), (b))</tt></dt>
<dd>a list of dags specifying parallel operations which map to the same
instruction.</dd>
<dt><tt>!strconcat(a, b)</tt></dt> <dt><tt>!strconcat(a, b)</tt></dt>
<dd>A string value that is the result of concatenating the 'a' and 'b' <dd>A string value that is the result of concatenating the 'a' and 'b'
strings.</dd> strings.</dd>