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R600/SI: Move flat instruction defs to CIInstructions.td
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239534 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -15,6 +15,8 @@ def isCIVI : Predicate <
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"Subtarget->getGeneration() == AMDGPUSubtarget::VOLCANIC_ISLANDS"
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>, AssemblerPredicate<"FeatureCIInsts">;
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def HasFlatAddressSpace : Predicate<"Subtarget->hasFlatAddressSpace()">;
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//===----------------------------------------------------------------------===//
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// VOP1 Instructions
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//===----------------------------------------------------------------------===//
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@ -40,3 +42,111 @@ defm V_EXP_LEGACY_F32 : VOP1Inst <vop1<0x46, 0x4b>, "v_exp_legacy_f32",
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VOP_F32_F32
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>;
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} // End SubtargetPredicate = isCIVI
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//===----------------------------------------------------------------------===//
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// Flat Instructions
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//===----------------------------------------------------------------------===//
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let Predicates = [HasFlatAddressSpace] in {
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def FLAT_LOAD_UBYTE : FLAT_Load_Helper <0x00000008, "flat_load_ubyte", VGPR_32>;
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def FLAT_LOAD_SBYTE : FLAT_Load_Helper <0x00000009, "flat_load_sbyte", VGPR_32>;
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def FLAT_LOAD_USHORT : FLAT_Load_Helper <0x0000000a, "flat_load_ushort", VGPR_32>;
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def FLAT_LOAD_SSHORT : FLAT_Load_Helper <0x0000000b, "flat_load_sshort", VGPR_32>;
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def FLAT_LOAD_DWORD : FLAT_Load_Helper <0x0000000c, "flat_load_dword", VGPR_32>;
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def FLAT_LOAD_DWORDX2 : FLAT_Load_Helper <0x0000000d, "flat_load_dwordx2", VReg_64>;
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def FLAT_LOAD_DWORDX4 : FLAT_Load_Helper <0x0000000e, "flat_load_dwordx4", VReg_128>;
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def FLAT_LOAD_DWORDX3 : FLAT_Load_Helper <0x00000010, "flat_load_dwordx3", VReg_96>;
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def FLAT_STORE_BYTE : FLAT_Store_Helper <
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0x00000018, "flat_store_byte", VGPR_32
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>;
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def FLAT_STORE_SHORT : FLAT_Store_Helper <
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0x0000001a, "flat_store_short", VGPR_32
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>;
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def FLAT_STORE_DWORD : FLAT_Store_Helper <
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0x0000001c, "flat_store_dword", VGPR_32
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>;
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def FLAT_STORE_DWORDX2 : FLAT_Store_Helper <
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0x0000001d, "flat_store_dwordx2", VReg_64
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>;
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def FLAT_STORE_DWORDX4 : FLAT_Store_Helper <
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0x0000001e, "flat_store_dwordx4", VReg_128
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>;
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def FLAT_STORE_DWORDX3 : FLAT_Store_Helper <
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0x0000001e, "flat_store_dwordx3", VReg_96
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>;
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//def FLAT_ATOMIC_SWAP : FLAT_ <0x00000030, "flat_atomic_swap", []>;
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//def FLAT_ATOMIC_CMPSWAP : FLAT_ <0x00000031, "flat_atomic_cmpswap", []>;
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//def FLAT_ATOMIC_ADD : FLAT_ <0x00000032, "flat_atomic_add", []>;
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//def FLAT_ATOMIC_SUB : FLAT_ <0x00000033, "flat_atomic_sub", []>;
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//def FLAT_ATOMIC_RSUB : FLAT_ <0x00000034, "flat_atomic_rsub", []>;
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//def FLAT_ATOMIC_SMIN : FLAT_ <0x00000035, "flat_atomic_smin", []>;
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//def FLAT_ATOMIC_UMIN : FLAT_ <0x00000036, "flat_atomic_umin", []>;
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//def FLAT_ATOMIC_SMAX : FLAT_ <0x00000037, "flat_atomic_smax", []>;
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//def FLAT_ATOMIC_UMAX : FLAT_ <0x00000038, "flat_atomic_umax", []>;
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//def FLAT_ATOMIC_AND : FLAT_ <0x00000039, "flat_atomic_and", []>;
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//def FLAT_ATOMIC_OR : FLAT_ <0x0000003a, "flat_atomic_or", []>;
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//def FLAT_ATOMIC_XOR : FLAT_ <0x0000003b, "flat_atomic_xor", []>;
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//def FLAT_ATOMIC_INC : FLAT_ <0x0000003c, "flat_atomic_inc", []>;
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//def FLAT_ATOMIC_DEC : FLAT_ <0x0000003d, "flat_atomic_dec", []>;
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//def FLAT_ATOMIC_FCMPSWAP : FLAT_ <0x0000003e, "flat_atomic_fcmpswap", []>;
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//def FLAT_ATOMIC_FMIN : FLAT_ <0x0000003f, "flat_atomic_fmin", []>;
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//def FLAT_ATOMIC_FMAX : FLAT_ <0x00000040, "flat_atomic_fmax", []>;
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//def FLAT_ATOMIC_SWAP_X2 : FLAT_X2 <0x00000050, "flat_atomic_swap_x2", []>;
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//def FLAT_ATOMIC_CMPSWAP_X2 : FLAT_X2 <0x00000051, "flat_atomic_cmpswap_x2", []>;
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//def FLAT_ATOMIC_ADD_X2 : FLAT_X2 <0x00000052, "flat_atomic_add_x2", []>;
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//def FLAT_ATOMIC_SUB_X2 : FLAT_X2 <0x00000053, "flat_atomic_sub_x2", []>;
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//def FLAT_ATOMIC_RSUB_X2 : FLAT_X2 <0x00000054, "flat_atomic_rsub_x2", []>;
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//def FLAT_ATOMIC_SMIN_X2 : FLAT_X2 <0x00000055, "flat_atomic_smin_x2", []>;
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//def FLAT_ATOMIC_UMIN_X2 : FLAT_X2 <0x00000056, "flat_atomic_umin_x2", []>;
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//def FLAT_ATOMIC_SMAX_X2 : FLAT_X2 <0x00000057, "flat_atomic_smax_x2", []>;
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//def FLAT_ATOMIC_UMAX_X2 : FLAT_X2 <0x00000058, "flat_atomic_umax_x2", []>;
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//def FLAT_ATOMIC_AND_X2 : FLAT_X2 <0x00000059, "flat_atomic_and_x2", []>;
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//def FLAT_ATOMIC_OR_X2 : FLAT_X2 <0x0000005a, "flat_atomic_or_x2", []>;
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//def FLAT_ATOMIC_XOR_X2 : FLAT_X2 <0x0000005b, "flat_atomic_xor_x2", []>;
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//def FLAT_ATOMIC_INC_X2 : FLAT_X2 <0x0000005c, "flat_atomic_inc_x2", []>;
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//def FLAT_ATOMIC_DEC_X2 : FLAT_X2 <0x0000005d, "flat_atomic_dec_x2", []>;
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//def FLAT_ATOMIC_FCMPSWAP_X2 : FLAT_X2 <0x0000005e, "flat_atomic_fcmpswap_x2", []>;
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//def FLAT_ATOMIC_FMIN_X2 : FLAT_X2 <0x0000005f, "flat_atomic_fmin_x2", []>;
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//def FLAT_ATOMIC_FMAX_X2 : FLAT_X2 <0x00000060, "flat_atomic_fmax_x2", []>;
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//===----------------------------------------------------------------------===//
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// Flat Patterns
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//===----------------------------------------------------------------------===//
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class FLATLoad_Pattern <FLAT Instr_ADDR64, ValueType vt,
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PatFrag flat_ld> :
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Pat <(vt (flat_ld i64:$ptr)),
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(Instr_ADDR64 $ptr)
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>;
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def : FLATLoad_Pattern <FLAT_LOAD_SBYTE, i32, sextloadi8_flat>;
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def : FLATLoad_Pattern <FLAT_LOAD_UBYTE, i32, az_extloadi8_flat>;
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def : FLATLoad_Pattern <FLAT_LOAD_SSHORT, i32, sextloadi16_flat>;
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def : FLATLoad_Pattern <FLAT_LOAD_USHORT, i32, az_extloadi16_flat>;
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def : FLATLoad_Pattern <FLAT_LOAD_DWORD, i32, flat_load>;
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def : FLATLoad_Pattern <FLAT_LOAD_DWORDX2, i64, flat_load>;
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def : FLATLoad_Pattern <FLAT_LOAD_DWORDX2, i64, az_extloadi32_flat>;
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def : FLATLoad_Pattern <FLAT_LOAD_DWORDX2, v2i32, flat_load>;
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def : FLATLoad_Pattern <FLAT_LOAD_DWORDX4, v4i32, flat_load>;
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class FLATStore_Pattern <FLAT Instr, ValueType vt, PatFrag st> :
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Pat <(st vt:$value, i64:$ptr),
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(Instr $value, $ptr)
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>;
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def : FLATStore_Pattern <FLAT_STORE_BYTE, i32, truncstorei8_flat>;
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def : FLATStore_Pattern <FLAT_STORE_SHORT, i32, truncstorei16_flat>;
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def : FLATStore_Pattern <FLAT_STORE_DWORD, i32, flat_store>;
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def : FLATStore_Pattern <FLAT_STORE_DWORDX2, i64, flat_store>;
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def : FLATStore_Pattern <FLAT_STORE_DWORDX2, v2i32, flat_store>;
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def : FLATStore_Pattern <FLAT_STORE_DWORDX4, v4i32, flat_store>;
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} // End HasFlatAddressSpace predicate
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@ -32,8 +32,6 @@ def isGCN : Predicate<"Subtarget->getGeneration() "
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def isSI : Predicate<"Subtarget->getGeneration() "
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"== AMDGPUSubtarget::SOUTHERN_ISLANDS">;
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def HasFlatAddressSpace : Predicate<"Subtarget.hasFlatAddressSpace()">;
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def has16BankLDS : Predicate<"Subtarget->getLDSBankCount() == 16">;
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def has32BankLDS : Predicate<"Subtarget->getLDSBankCount() == 32">;
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@ -1153,80 +1151,6 @@ defm IMAGE_SAMPLE_C_CD_CL_O : MIMG_Sampler <0x0000006f, "image_sample_c_cd_cl_o"
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//def IMAGE_RSRC256 : MIMG_NoPattern_RSRC256 <"image_rsrc256", 0x0000007e>;
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//def IMAGE_SAMPLER : MIMG_NoPattern_ <"image_sampler", 0x0000007f>;
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//===----------------------------------------------------------------------===//
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// Flat Instructions
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//===----------------------------------------------------------------------===//
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let Predicates = [HasFlatAddressSpace] in {
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def FLAT_LOAD_UBYTE : FLAT_Load_Helper <0x00000008, "flat_load_ubyte", VGPR_32>;
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def FLAT_LOAD_SBYTE : FLAT_Load_Helper <0x00000009, "flat_load_sbyte", VGPR_32>;
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def FLAT_LOAD_USHORT : FLAT_Load_Helper <0x0000000a, "flat_load_ushort", VGPR_32>;
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def FLAT_LOAD_SSHORT : FLAT_Load_Helper <0x0000000b, "flat_load_sshort", VGPR_32>;
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def FLAT_LOAD_DWORD : FLAT_Load_Helper <0x0000000c, "flat_load_dword", VGPR_32>;
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def FLAT_LOAD_DWORDX2 : FLAT_Load_Helper <0x0000000d, "flat_load_dwordx2", VReg_64>;
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def FLAT_LOAD_DWORDX4 : FLAT_Load_Helper <0x0000000e, "flat_load_dwordx4", VReg_128>;
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def FLAT_LOAD_DWORDX3 : FLAT_Load_Helper <0x00000010, "flat_load_dwordx3", VReg_96>;
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def FLAT_STORE_BYTE : FLAT_Store_Helper <
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0x00000018, "flat_store_byte", VGPR_32
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>;
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def FLAT_STORE_SHORT : FLAT_Store_Helper <
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0x0000001a, "flat_store_short", VGPR_32
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>;
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def FLAT_STORE_DWORD : FLAT_Store_Helper <
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0x0000001c, "flat_store_dword", VGPR_32
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>;
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def FLAT_STORE_DWORDX2 : FLAT_Store_Helper <
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0x0000001d, "flat_store_dwordx2", VReg_64
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>;
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def FLAT_STORE_DWORDX4 : FLAT_Store_Helper <
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0x0000001e, "flat_store_dwordx4", VReg_128
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>;
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def FLAT_STORE_DWORDX3 : FLAT_Store_Helper <
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0x0000001e, "flat_store_dwordx3", VReg_96
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>;
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//def FLAT_ATOMIC_SWAP : FLAT_ <0x00000030, "flat_atomic_swap", []>;
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//def FLAT_ATOMIC_CMPSWAP : FLAT_ <0x00000031, "flat_atomic_cmpswap", []>;
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//def FLAT_ATOMIC_ADD : FLAT_ <0x00000032, "flat_atomic_add", []>;
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//def FLAT_ATOMIC_SUB : FLAT_ <0x00000033, "flat_atomic_sub", []>;
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//def FLAT_ATOMIC_RSUB : FLAT_ <0x00000034, "flat_atomic_rsub", []>;
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//def FLAT_ATOMIC_SMIN : FLAT_ <0x00000035, "flat_atomic_smin", []>;
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//def FLAT_ATOMIC_UMIN : FLAT_ <0x00000036, "flat_atomic_umin", []>;
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//def FLAT_ATOMIC_SMAX : FLAT_ <0x00000037, "flat_atomic_smax", []>;
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//def FLAT_ATOMIC_UMAX : FLAT_ <0x00000038, "flat_atomic_umax", []>;
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//def FLAT_ATOMIC_AND : FLAT_ <0x00000039, "flat_atomic_and", []>;
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//def FLAT_ATOMIC_OR : FLAT_ <0x0000003a, "flat_atomic_or", []>;
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//def FLAT_ATOMIC_XOR : FLAT_ <0x0000003b, "flat_atomic_xor", []>;
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//def FLAT_ATOMIC_INC : FLAT_ <0x0000003c, "flat_atomic_inc", []>;
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//def FLAT_ATOMIC_DEC : FLAT_ <0x0000003d, "flat_atomic_dec", []>;
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//def FLAT_ATOMIC_FCMPSWAP : FLAT_ <0x0000003e, "flat_atomic_fcmpswap", []>;
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//def FLAT_ATOMIC_FMIN : FLAT_ <0x0000003f, "flat_atomic_fmin", []>;
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//def FLAT_ATOMIC_FMAX : FLAT_ <0x00000040, "flat_atomic_fmax", []>;
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//def FLAT_ATOMIC_SWAP_X2 : FLAT_X2 <0x00000050, "flat_atomic_swap_x2", []>;
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//def FLAT_ATOMIC_CMPSWAP_X2 : FLAT_X2 <0x00000051, "flat_atomic_cmpswap_x2", []>;
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//def FLAT_ATOMIC_ADD_X2 : FLAT_X2 <0x00000052, "flat_atomic_add_x2", []>;
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//def FLAT_ATOMIC_SUB_X2 : FLAT_X2 <0x00000053, "flat_atomic_sub_x2", []>;
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//def FLAT_ATOMIC_RSUB_X2 : FLAT_X2 <0x00000054, "flat_atomic_rsub_x2", []>;
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//def FLAT_ATOMIC_SMIN_X2 : FLAT_X2 <0x00000055, "flat_atomic_smin_x2", []>;
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//def FLAT_ATOMIC_UMIN_X2 : FLAT_X2 <0x00000056, "flat_atomic_umin_x2", []>;
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//def FLAT_ATOMIC_SMAX_X2 : FLAT_X2 <0x00000057, "flat_atomic_smax_x2", []>;
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//def FLAT_ATOMIC_UMAX_X2 : FLAT_X2 <0x00000058, "flat_atomic_umax_x2", []>;
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//def FLAT_ATOMIC_AND_X2 : FLAT_X2 <0x00000059, "flat_atomic_and_x2", []>;
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//def FLAT_ATOMIC_OR_X2 : FLAT_X2 <0x0000005a, "flat_atomic_or_x2", []>;
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//def FLAT_ATOMIC_XOR_X2 : FLAT_X2 <0x0000005b, "flat_atomic_xor_x2", []>;
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//def FLAT_ATOMIC_INC_X2 : FLAT_X2 <0x0000005c, "flat_atomic_inc_x2", []>;
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//def FLAT_ATOMIC_DEC_X2 : FLAT_X2 <0x0000005d, "flat_atomic_dec_x2", []>;
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//def FLAT_ATOMIC_FCMPSWAP_X2 : FLAT_X2 <0x0000005e, "flat_atomic_fcmpswap_x2", []>;
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//def FLAT_ATOMIC_FMIN_X2 : FLAT_X2 <0x0000005f, "flat_atomic_fmin_x2", []>;
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//def FLAT_ATOMIC_FMAX_X2 : FLAT_X2 <0x00000060, "flat_atomic_fmax_x2", []>;
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} // End HasFlatAddressSpace predicate
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//===----------------------------------------------------------------------===//
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// VOP1 Instructions
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//===----------------------------------------------------------------------===//
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@ -3130,38 +3054,6 @@ defm V_MAD_I64_I32 : VOP3Inst <vop3<0x177>, "v_mad_i64_i32",
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} // End isCI
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//===----------------------------------------------------------------------===//
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// Flat Patterns
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//===----------------------------------------------------------------------===//
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class FLATLoad_Pattern <FLAT Instr_ADDR64, ValueType vt,
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PatFrag flat_ld> :
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Pat <(vt (flat_ld i64:$ptr)),
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(Instr_ADDR64 $ptr)
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>;
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def : FLATLoad_Pattern <FLAT_LOAD_SBYTE, i32, sextloadi8_flat>;
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def : FLATLoad_Pattern <FLAT_LOAD_UBYTE, i32, az_extloadi8_flat>;
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def : FLATLoad_Pattern <FLAT_LOAD_SSHORT, i32, sextloadi16_flat>;
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def : FLATLoad_Pattern <FLAT_LOAD_USHORT, i32, az_extloadi16_flat>;
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def : FLATLoad_Pattern <FLAT_LOAD_DWORD, i32, flat_load>;
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def : FLATLoad_Pattern <FLAT_LOAD_DWORDX2, i64, flat_load>;
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def : FLATLoad_Pattern <FLAT_LOAD_DWORDX2, i64, az_extloadi32_flat>;
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def : FLATLoad_Pattern <FLAT_LOAD_DWORDX2, v2i32, flat_load>;
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def : FLATLoad_Pattern <FLAT_LOAD_DWORDX4, v4i32, flat_load>;
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class FLATStore_Pattern <FLAT Instr, ValueType vt, PatFrag st> :
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Pat <(st vt:$value, i64:$ptr),
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(Instr $value, $ptr)
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>;
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def : FLATStore_Pattern <FLAT_STORE_BYTE, i32, truncstorei8_flat>;
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def : FLATStore_Pattern <FLAT_STORE_SHORT, i32, truncstorei16_flat>;
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def : FLATStore_Pattern <FLAT_STORE_DWORD, i32, flat_store>;
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def : FLATStore_Pattern <FLAT_STORE_DWORDX2, i64, flat_store>;
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def : FLATStore_Pattern <FLAT_STORE_DWORDX2, v2i32, flat_store>;
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def : FLATStore_Pattern <FLAT_STORE_DWORDX4, v4i32, flat_store>;
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/********** ====================== **********/
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/********** Indirect adressing **********/
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/********** ====================== **********/
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