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Add IMULr16 & IMULr32 instructions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6829 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -166,22 +166,24 @@ I(SBBrr32 , "sbb", 0x19, M_2_ADDR_FLAG, X86II::MRMDestReg | X86II::Arg32, N
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I(MULr8 , "mul", 0xF6, 0, X86II::MRMS4r | X86II::Void, O_AL, O_AX) // AX = AL*R8
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I(MULr16 , "mul", 0xF7, 0, X86II::MRMS4r | X86II::Void | // DX:AX= AX*R16
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X86II::OpSize, O_AX, T_AXDX)
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X86II::OpSize, O_AX, T_AXDX)
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I(MULr32 , "mul", 0xF7, 0, X86II::MRMS4r | X86II::Void, O_EAX, T_EAXEDX) // ED:EA= EA*R32
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I(IMULr16 , "imul", 0xAF, M_2_ADDR_FLAG, X86II::MRMSrcReg | X86II::TB | // R16 *= R16
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X86II::OpSize, NoIR, NoIR)
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I(IMULr32 , "imul", 0xAF, M_2_ADDR_FLAG, X86II::MRMSrcReg | X86II::TB, NoIR, NoIR) // R32 *= R32
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// unsigned division/remainder
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I(DIVr8 , "div", 0xF6, 0, X86II::MRMS6r | X86II::Void, O_AX, O_AX) // AX/r8= AL&AH
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I(DIVr16 , "div", 0xF7, 0, X86II::MRMS6r | X86II::Void | // ED:EA/r16=AX&DX
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X86II::OpSize, T_AXDX, T_AXDX)
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I(DIVr32 , "div", 0xF7, 0, X86II::MRMS6r | X86II::Void, T_EAXEDX,
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T_EAXEDX) // ED:EA/r32=EA&ED
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X86II::OpSize, T_AXDX, T_AXDX)
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I(DIVr32 , "div", 0xF7, 0, X86II::MRMS6r | X86II::Void, T_EAXEDX,T_EAXEDX)// ED:EA/r32=EA&ED
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// signed division/remainder
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I(IDIVr8 , "idiv", 0xF6, 0, X86II::MRMS7r | X86II::Void, O_AX, O_AX) // AX/r8= AL&AH
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I(IDIVr16 , "idiv", 0xF7, 0, X86II::MRMS7r | X86II::Void | // DA/r16=AX&DX
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X86II::OpSize, T_AXDX, T_AXDX)
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I(IDIVr32 , "idiv", 0xF7, 0, X86II::MRMS7r | X86II::Void, T_EAXEDX,
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T_EAXEDX) // DA/r32=EAX&DX
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X86II::OpSize, T_AXDX, T_AXDX)
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I(IDIVr32 , "idiv", 0xF7, 0, X86II::MRMS7r | X86II::Void, T_EAXEDX,T_EAXEDX)// DA/r32=EAX&DX
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// Logical operators
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I(ANDrr8 , "and", 0x20, M_2_ADDR_FLAG, X86II::MRMDestReg, NoIR, NoIR) // R8 &= R8
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