mirror of
https://github.com/RPCS3/llvm.git
synced 2025-02-01 00:02:16 +00:00
updated suggesting/coloring of call & return args & implicit operands.
Changed added instr to a deque (from a vector) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@831 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Ruchira Sasanka
parent
cc3ccac238
commit
a90e77061d
@ -108,30 +108,27 @@ void LiveRangeInfo::constructLiveRanges()
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const MachineInstr * MInst = *MInstIterator;
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// Now if the machine instruction has special operands that must be
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// set with a "suggested color", do it here.
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// This will be true for call/return instructions
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// Now if the machine instruction is a call/return instruction,
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// add it to CallRetInstrList for processing its implicit operands
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if( MRI.handleSpecialMInstr(MInst, *this, RegClassList) )
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continue;
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if( (TM.getInstrInfo()).isReturn( MInst->getOpCode()) ||
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(TM.getInstrInfo()).isCall( MInst->getOpCode()) )
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CallRetInstrList.push_back( MInst );
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// iterate over MI operands to find defs
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for( MachineInstr::val_op_const_iterator OpI(MInst);!OpI.done(); ++OpI) {
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if( DEBUG_RA) {
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MachineOperand::MachineOperandType OpTyp =
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OpI.getMachineOperand().getOperandType();
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// delete later from here ************
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MachineOperand::MachineOperandType OpTyp =
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OpI.getMachineOperand().getOperandType();
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if (DEBUG_RA && OpTyp == MachineOperand::MO_CCRegister) {
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cout << "\n**CC reg found. Is Def=" << OpI.isDef() << " Val:";
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printValue( OpI.getMachineOperand().getVRegValue() );
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cout << endl;
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if ( OpTyp == MachineOperand::MO_CCRegister) {
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cout << "\n**CC reg found. Is Def=" << OpI.isDef() << " Val:";
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printValue( OpI.getMachineOperand().getVRegValue() );
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cout << endl;
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}
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}
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// ************* to here
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// create a new LR iff this operand is a def
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if( OpI.isDef() ) {
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@ -193,52 +190,20 @@ void LiveRangeInfo::constructLiveRanges()
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}
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}
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} // if isDef()
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} // for all opereands in machine instructions
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} // for all machine instructions in the BB
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} // for all BBs in method
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// go thru LLVM instructions in the basic block and suggest colors
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// for their args. Also record all CALL
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// instructions and Return instructions in the CallRetInstrList
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// This is done because since there are no reverse pointers in machine
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// instructions to find the llvm instruction, when we encounter a call
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// or a return whose args must be specailly colored (e.g., %o's for args)
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// We have to makes sure that all LRs of call/ret args are added before
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// doing this. But return value of call will not have a LR.
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BBI = Meth->begin(); // random iterator for BBs
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// Now we have to suggest clors for call and return arg live ranges.
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// Also, if there are implicit defs (e.g., retun value of a call inst)
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// they must be added to the live range list
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for( ; BBI != Meth->end(); ++BBI) { // go thru BBs in random order
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BasicBlock::const_iterator InstIt = (*BBI)->begin();
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for( ; InstIt != (*BBI)->end() ; ++InstIt) {
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const Instruction *const CallRetI = *InstIt;
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unsigned OpCode = (CallRetI)->getOpcode();
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if( (OpCode == Instruction::Call) ) {
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CallRetInstrList.push_back(CallRetI );
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MRI.suggestRegs4CallArgs( (CallInst *) CallRetI, *this, RegClassList );
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}
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else if (OpCode == Instruction::Ret ) {
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CallRetInstrList.push_back( CallRetI );
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MRI.suggestReg4RetValue( (ReturnInst *) CallRetI, *this);
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}
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} // for each llvm instr in BB
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} // for all BBs in method
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suggestRegs4CallRets();
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if( DEBUG_RA)
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cout << "Initial Live Ranges constructed!" << endl;
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@ -247,6 +212,34 @@ void LiveRangeInfo::constructLiveRanges()
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// Suggest colors for call and return args.
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// Also create new LRs for implicit defs
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void LiveRangeInfo::suggestRegs4CallRets()
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{
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CallRetInstrListType::const_iterator It = CallRetInstrList.begin();
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for( ; It != CallRetInstrList.end(); ++It ) {
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const MachineInstr *MInst = *It;
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MachineOpCode OpCode = MInst->getOpCode();
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if( (TM.getInstrInfo()).isReturn(OpCode) )
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MRI.suggestReg4RetValue( MInst, *this);
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else if( (TM.getInstrInfo()).isCall( OpCode ) )
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MRI.suggestRegs4CallArgs( MInst, *this, RegClassList );
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else
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assert( 0 && "Non call/ret instr in CallRetInstrList" );
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}
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}
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void LiveRangeInfo::coalesceLRs()
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{
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@ -318,8 +311,6 @@ void LiveRangeInfo::coalesceLRs()
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if( RCOfDef == RCOfUse ) { // if the reg classes are the same
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// if( LROfUse->getTypeID() == LROfDef->getTypeID() ) {
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if( ! RCOfDef->getInterference(LROfDef, LROfUse) ) {
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unsigned CombinedDegree =
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@ -248,6 +248,100 @@ void PhyRegAlloc::addInterferencesForArgs()
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}
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#if 0
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//----------------------------------------------------------------------------
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//----------------------------------------------------------------------------
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void PhyRegAlloc::insertCallerSavingCode(const MachineInstr *MInst,
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const BasicBlock *BB )
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{
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assert( (TM.getInstrInfo()).isCall( MInst->getOpCode() ) );
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int StackOff = 10; // ****TODO : Change
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set<unsigned> PushedRegSet();
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// Now find the LR of the return value of the call
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// The last *implicit operand* is the return value of a call
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// Insert it to to he PushedRegSet since we must not save that register
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// and restore it after the call.
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// We do this because, we look at the LV set *after* the instruction
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// to determine, which LRs must be saved across calls. The return value
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// of the call is live in this set - but we must not save/restore it.
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unsigned NumOfImpRefs = MInst->getNumImplicitRefs();
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if( NumOfImpRefs > 0 ) {
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if( MInst->implicitRefIsDefined(NumOfImpRefs-1) ) {
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const Value *RetVal = CallMI->getImplicitRef(NumOfImpRefs-1);
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LiveRange *RetValLR = LRI.getLiveRangeForValue( RetVal );
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assert( RetValLR && "No LR for RetValue of call");
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PushedRegSet.insert(
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MRI.getUnifiedRegNum((RetValLR->getRegClass())->getID(),
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RetValLR->getColor() ) );
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}
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}
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LiveVarSet *LVSetAft = LVI->getLiveVarSetAfterMInst(MInst, BB);
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LiveVarSet::const_iterator LIt = LVSetAft->begin();
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// for each live var in live variable set after machine inst
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for( ; LIt != LVSetAft->end(); ++LIt) {
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// get the live range corresponding to live var
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LiveRange *const LR = LRI.getLiveRangeForValue(*LIt );
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// LROfVar can be null if it is a const since a const
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// doesn't have a dominating def - see Assumptions above
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if( LR ) {
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if( LR->hasColor() ) {
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unsigned RCID = (LR->getRegClass())->getID();
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unsigned Color = LR->getColor();
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if ( MRI.isRegVolatile(RCID, Color) ) {
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// if the value is in both LV sets (i.e., live before and after
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// the call machine instruction)
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unsigned Reg = MRI.getUnifiedRegNum(RCID, Color);
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if( PuhsedRegSet.find(Reg) == PhusedRegSet.end() ) {
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// if we haven't already pushed that register
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MachineInstr *AdI =
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MRI.saveRegOnStackMI(Reg, MRI.getFPReg(), StackOff );
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((AddedInstrMap[MInst])->InstrnsBefore).push_front(AdI);
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((AddedInstrMap[MInst])->InstrnsAfter).push_back(AdI);
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PushedRegSet.insert( Reg );
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StackOff += 4; // ****TODO: Correct ??????
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cout << "Inserted caller saving instr");
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} // if not already pushed
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} // if LR has a volatile color
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} // if LR has color
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} // if there is a LR for Var
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} // for each value in the LV set after instruction
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}
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#endif
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//----------------------------------------------------------------------------
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// This method is called after register allocation is complete to set the
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// allocated reisters in the machine code. This code will add register numbers
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@ -275,12 +369,12 @@ void PhyRegAlloc::updateMachineCode()
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// ***TODO: Add InstrnsAfter as well
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if( AddedInstrMap[ MInst ] ) {
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vector<MachineInstr *> &IBef =
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deque<MachineInstr *> &IBef =
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(AddedInstrMap[MInst])->InstrnsBefore;
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if( ! IBef.empty() ) {
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vector<MachineInstr *>::iterator AdIt;
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deque<MachineInstr *>::iterator AdIt;
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for( AdIt = IBef.begin(); AdIt != IBef.end() ; ++AdIt ) {
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@ -331,7 +425,8 @@ void PhyRegAlloc::updateMachineCode()
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cout << TargetInstrDescriptors[MInst->getOpCode()].opCodeString;
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}
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Op.setRegForValue( 1000 ); // mark register as invalid
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if( Op.getAllocatedRegNum() == -1)
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Op.setRegForValue( 1000 ); // mark register as invalid
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#if 0
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if( ((Val->getType())->isLabelType()) ||
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@ -475,16 +570,9 @@ void PhyRegAlloc::colorCallRetArgs()
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for( ; It != CallRetInstList.end(); ++It ) {
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const Instruction *const CallRetI = *It;
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unsigned OpCode = (CallRetI)->getOpcode();
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const MachineInstr *const CRMI = *It;
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unsigned OpCode = CRMI->getOpCode();
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const MachineInstr *CRMI = *((CallRetI->getMachineInstrVec()).begin());
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assert( (TM.getInstrInfo().isReturn(CRMI->getOpCode()) ||
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TM.getInstrInfo().isCall(CRMI->getOpCode()) )
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&& "First Machine Instruction is not a Call/Retrunr" );
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// get the added instructions for this Call/Ret instruciton
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AddedInstrns *AI = AddedInstrMap[ CRMI ];
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if ( !AI ) {
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@ -492,14 +580,12 @@ void PhyRegAlloc::colorCallRetArgs()
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AddedInstrMap[ CRMI ] = AI;
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}
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if( (OpCode == Instruction::Call) )
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MRI.colorCallArgs( (CallInst *) CallRetI, LRI, AI );
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if( (TM.getInstrInfo()).isCall( OpCode ) )
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MRI.colorCallArgs( CRMI, LRI, AI );
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else if (OpCode == Instruction::Ret )
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MRI.colorRetValue( (ReturnInst *) CallRetI, LRI, AI );
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else if ( (TM.getInstrInfo()).isReturn(OpCode) )
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MRI.colorRetValue( CRMI, LRI, AI );
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else assert( 0 && "Non Call/Ret instrn in CallRetInstrList\n" );
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}
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@ -108,30 +108,27 @@ void LiveRangeInfo::constructLiveRanges()
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const MachineInstr * MInst = *MInstIterator;
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// Now if the machine instruction has special operands that must be
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// set with a "suggested color", do it here.
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// This will be true for call/return instructions
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// Now if the machine instruction is a call/return instruction,
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// add it to CallRetInstrList for processing its implicit operands
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if( MRI.handleSpecialMInstr(MInst, *this, RegClassList) )
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continue;
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if( (TM.getInstrInfo()).isReturn( MInst->getOpCode()) ||
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(TM.getInstrInfo()).isCall( MInst->getOpCode()) )
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CallRetInstrList.push_back( MInst );
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// iterate over MI operands to find defs
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for( MachineInstr::val_op_const_iterator OpI(MInst);!OpI.done(); ++OpI) {
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if( DEBUG_RA) {
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MachineOperand::MachineOperandType OpTyp =
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OpI.getMachineOperand().getOperandType();
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// delete later from here ************
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MachineOperand::MachineOperandType OpTyp =
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OpI.getMachineOperand().getOperandType();
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if (DEBUG_RA && OpTyp == MachineOperand::MO_CCRegister) {
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cout << "\n**CC reg found. Is Def=" << OpI.isDef() << " Val:";
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printValue( OpI.getMachineOperand().getVRegValue() );
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cout << endl;
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if ( OpTyp == MachineOperand::MO_CCRegister) {
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cout << "\n**CC reg found. Is Def=" << OpI.isDef() << " Val:";
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printValue( OpI.getMachineOperand().getVRegValue() );
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cout << endl;
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}
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}
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// ************* to here
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// create a new LR iff this operand is a def
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if( OpI.isDef() ) {
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@ -193,52 +190,20 @@ void LiveRangeInfo::constructLiveRanges()
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}
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}
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} // if isDef()
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} // for all opereands in machine instructions
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} // for all machine instructions in the BB
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} // for all BBs in method
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// go thru LLVM instructions in the basic block and suggest colors
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// for their args. Also record all CALL
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// instructions and Return instructions in the CallRetInstrList
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// This is done because since there are no reverse pointers in machine
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// instructions to find the llvm instruction, when we encounter a call
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// or a return whose args must be specailly colored (e.g., %o's for args)
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// We have to makes sure that all LRs of call/ret args are added before
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// doing this. But return value of call will not have a LR.
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BBI = Meth->begin(); // random iterator for BBs
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// Now we have to suggest clors for call and return arg live ranges.
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// Also, if there are implicit defs (e.g., retun value of a call inst)
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// they must be added to the live range list
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for( ; BBI != Meth->end(); ++BBI) { // go thru BBs in random order
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BasicBlock::const_iterator InstIt = (*BBI)->begin();
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for( ; InstIt != (*BBI)->end() ; ++InstIt) {
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const Instruction *const CallRetI = *InstIt;
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unsigned OpCode = (CallRetI)->getOpcode();
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if( (OpCode == Instruction::Call) ) {
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CallRetInstrList.push_back(CallRetI );
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MRI.suggestRegs4CallArgs( (CallInst *) CallRetI, *this, RegClassList );
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}
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else if (OpCode == Instruction::Ret ) {
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CallRetInstrList.push_back( CallRetI );
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MRI.suggestReg4RetValue( (ReturnInst *) CallRetI, *this);
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}
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} // for each llvm instr in BB
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} // for all BBs in method
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suggestRegs4CallRets();
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if( DEBUG_RA)
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cout << "Initial Live Ranges constructed!" << endl;
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@ -247,6 +212,34 @@ void LiveRangeInfo::constructLiveRanges()
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// Suggest colors for call and return args.
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// Also create new LRs for implicit defs
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void LiveRangeInfo::suggestRegs4CallRets()
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{
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CallRetInstrListType::const_iterator It = CallRetInstrList.begin();
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for( ; It != CallRetInstrList.end(); ++It ) {
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const MachineInstr *MInst = *It;
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MachineOpCode OpCode = MInst->getOpCode();
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if( (TM.getInstrInfo()).isReturn(OpCode) )
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MRI.suggestReg4RetValue( MInst, *this);
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else if( (TM.getInstrInfo()).isCall( OpCode ) )
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MRI.suggestRegs4CallArgs( MInst, *this, RegClassList );
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else
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assert( 0 && "Non call/ret instr in CallRetInstrList" );
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}
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}
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void LiveRangeInfo::coalesceLRs()
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{
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@ -318,8 +311,6 @@ void LiveRangeInfo::coalesceLRs()
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if( RCOfDef == RCOfUse ) { // if the reg classes are the same
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// if( LROfUse->getTypeID() == LROfDef->getTypeID() ) {
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if( ! RCOfDef->getInterference(LROfDef, LROfUse) ) {
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unsigned CombinedDegree =
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@ -248,6 +248,100 @@ void PhyRegAlloc::addInterferencesForArgs()
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}
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#if 0
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//----------------------------------------------------------------------------
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//----------------------------------------------------------------------------
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void PhyRegAlloc::insertCallerSavingCode(const MachineInstr *MInst,
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const BasicBlock *BB )
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{
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assert( (TM.getInstrInfo()).isCall( MInst->getOpCode() ) );
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int StackOff = 10; // ****TODO : Change
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set<unsigned> PushedRegSet();
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// Now find the LR of the return value of the call
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// The last *implicit operand* is the return value of a call
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// Insert it to to he PushedRegSet since we must not save that register
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// and restore it after the call.
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// We do this because, we look at the LV set *after* the instruction
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// to determine, which LRs must be saved across calls. The return value
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// of the call is live in this set - but we must not save/restore it.
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unsigned NumOfImpRefs = MInst->getNumImplicitRefs();
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if( NumOfImpRefs > 0 ) {
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if( MInst->implicitRefIsDefined(NumOfImpRefs-1) ) {
|
||||
|
||||
const Value *RetVal = CallMI->getImplicitRef(NumOfImpRefs-1);
|
||||
LiveRange *RetValLR = LRI.getLiveRangeForValue( RetVal );
|
||||
assert( RetValLR && "No LR for RetValue of call");
|
||||
|
||||
PushedRegSet.insert(
|
||||
MRI.getUnifiedRegNum((RetValLR->getRegClass())->getID(),
|
||||
RetValLR->getColor() ) );
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
|
||||
LiveVarSet *LVSetAft = LVI->getLiveVarSetAfterMInst(MInst, BB);
|
||||
|
||||
LiveVarSet::const_iterator LIt = LVSetAft->begin();
|
||||
|
||||
// for each live var in live variable set after machine inst
|
||||
for( ; LIt != LVSetAft->end(); ++LIt) {
|
||||
|
||||
// get the live range corresponding to live var
|
||||
LiveRange *const LR = LRI.getLiveRangeForValue(*LIt );
|
||||
|
||||
// LROfVar can be null if it is a const since a const
|
||||
// doesn't have a dominating def - see Assumptions above
|
||||
if( LR ) {
|
||||
|
||||
if( LR->hasColor() ) {
|
||||
|
||||
unsigned RCID = (LR->getRegClass())->getID();
|
||||
unsigned Color = LR->getColor();
|
||||
|
||||
if ( MRI.isRegVolatile(RCID, Color) ) {
|
||||
|
||||
// if the value is in both LV sets (i.e., live before and after
|
||||
// the call machine instruction)
|
||||
|
||||
unsigned Reg = MRI.getUnifiedRegNum(RCID, Color);
|
||||
|
||||
if( PuhsedRegSet.find(Reg) == PhusedRegSet.end() ) {
|
||||
|
||||
// if we haven't already pushed that register
|
||||
|
||||
MachineInstr *AdI =
|
||||
MRI.saveRegOnStackMI(Reg, MRI.getFPReg(), StackOff );
|
||||
|
||||
((AddedInstrMap[MInst])->InstrnsBefore).push_front(AdI);
|
||||
((AddedInstrMap[MInst])->InstrnsAfter).push_back(AdI);
|
||||
|
||||
|
||||
PushedRegSet.insert( Reg );
|
||||
StackOff += 4; // ****TODO: Correct ??????
|
||||
cout << "Inserted caller saving instr");
|
||||
|
||||
} // if not already pushed
|
||||
|
||||
} // if LR has a volatile color
|
||||
|
||||
} // if LR has color
|
||||
|
||||
} // if there is a LR for Var
|
||||
|
||||
} // for each value in the LV set after instruction
|
||||
|
||||
}
|
||||
|
||||
#endif
|
||||
|
||||
//----------------------------------------------------------------------------
|
||||
// This method is called after register allocation is complete to set the
|
||||
// allocated reisters in the machine code. This code will add register numbers
|
||||
@ -275,12 +369,12 @@ void PhyRegAlloc::updateMachineCode()
|
||||
// ***TODO: Add InstrnsAfter as well
|
||||
if( AddedInstrMap[ MInst ] ) {
|
||||
|
||||
vector<MachineInstr *> &IBef =
|
||||
deque<MachineInstr *> &IBef =
|
||||
(AddedInstrMap[MInst])->InstrnsBefore;
|
||||
|
||||
if( ! IBef.empty() ) {
|
||||
|
||||
vector<MachineInstr *>::iterator AdIt;
|
||||
deque<MachineInstr *>::iterator AdIt;
|
||||
|
||||
for( AdIt = IBef.begin(); AdIt != IBef.end() ; ++AdIt ) {
|
||||
|
||||
@ -331,7 +425,8 @@ void PhyRegAlloc::updateMachineCode()
|
||||
cout << TargetInstrDescriptors[MInst->getOpCode()].opCodeString;
|
||||
}
|
||||
|
||||
Op.setRegForValue( 1000 ); // mark register as invalid
|
||||
if( Op.getAllocatedRegNum() == -1)
|
||||
Op.setRegForValue( 1000 ); // mark register as invalid
|
||||
|
||||
#if 0
|
||||
if( ((Val->getType())->isLabelType()) ||
|
||||
@ -475,16 +570,9 @@ void PhyRegAlloc::colorCallRetArgs()
|
||||
|
||||
for( ; It != CallRetInstList.end(); ++It ) {
|
||||
|
||||
const Instruction *const CallRetI = *It;
|
||||
unsigned OpCode = (CallRetI)->getOpcode();
|
||||
const MachineInstr *const CRMI = *It;
|
||||
unsigned OpCode = CRMI->getOpCode();
|
||||
|
||||
const MachineInstr *CRMI = *((CallRetI->getMachineInstrVec()).begin());
|
||||
|
||||
|
||||
assert( (TM.getInstrInfo().isReturn(CRMI->getOpCode()) ||
|
||||
TM.getInstrInfo().isCall(CRMI->getOpCode()) )
|
||||
&& "First Machine Instruction is not a Call/Retrunr" );
|
||||
|
||||
// get the added instructions for this Call/Ret instruciton
|
||||
AddedInstrns *AI = AddedInstrMap[ CRMI ];
|
||||
if ( !AI ) {
|
||||
@ -492,14 +580,12 @@ void PhyRegAlloc::colorCallRetArgs()
|
||||
AddedInstrMap[ CRMI ] = AI;
|
||||
}
|
||||
|
||||
if( (OpCode == Instruction::Call) )
|
||||
MRI.colorCallArgs( (CallInst *) CallRetI, LRI, AI );
|
||||
if( (TM.getInstrInfo()).isCall( OpCode ) )
|
||||
MRI.colorCallArgs( CRMI, LRI, AI );
|
||||
|
||||
|
||||
else if (OpCode == Instruction::Ret )
|
||||
MRI.colorRetValue( (ReturnInst *) CallRetI, LRI, AI );
|
||||
else if ( (TM.getInstrInfo()).isReturn(OpCode) )
|
||||
MRI.colorRetValue( CRMI, LRI, AI );
|
||||
|
||||
|
||||
else assert( 0 && "Non Call/Ret instrn in CallRetInstrList\n" );
|
||||
|
||||
}
|
||||
|
||||
Loading…
x
Reference in New Issue
Block a user