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AMDGPU: Set sizes on control flow pseudos
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278276 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -1791,40 +1791,48 @@ def SI_IF: PseudoInstSI <
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(outs SReg_64:$dst), (ins SReg_64:$vcc, brtarget:$target),
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[(set i64:$dst, (int_amdgcn_if i1:$vcc, bb:$target))]> {
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let Constraints = "";
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let Size = 8;
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}
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def SI_ELSE : PseudoInstSI <
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(outs SReg_64:$dst), (ins SReg_64:$src, brtarget:$target, i1imm:$execfix)> {
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let Constraints = "$src = $dst";
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let Size = 12;
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}
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def SI_LOOP : PseudoInstSI <
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(outs), (ins SReg_64:$saved, brtarget:$target),
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[(int_amdgcn_loop i64:$saved, bb:$target)]
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>;
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[(int_amdgcn_loop i64:$saved, bb:$target)]> {
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let Size = 8;
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}
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} // End isBranch = 1, isTerminator = 1
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def SI_BREAK : PseudoInstSI <
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(outs SReg_64:$dst), (ins SReg_64:$src),
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[(set i64:$dst, (int_amdgcn_break i64:$src))]
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>;
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[(set i64:$dst, (int_amdgcn_break i64:$src))]> {
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let Size = 4;
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}
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def SI_IF_BREAK : PseudoInstSI <
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(outs SReg_64:$dst), (ins SReg_64:$vcc, SReg_64:$src),
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[(set i64:$dst, (int_amdgcn_if_break i1:$vcc, i64:$src))]
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>;
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> {
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let Size = 4;
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}
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def SI_ELSE_BREAK : PseudoInstSI <
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(outs SReg_64:$dst), (ins SReg_64:$src0, SReg_64:$src1),
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[(set i64:$dst, (int_amdgcn_else_break i64:$src0, i64:$src1))]
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>;
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[(set i64:$dst, (int_amdgcn_else_break i64:$src0, i64:$src1))]> {
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let Size = 4;
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}
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def SI_END_CF : PseudoInstSI <
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(outs), (ins SReg_64:$saved),
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[(int_amdgcn_end_cf i64:$saved)]
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>;
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[(int_amdgcn_end_cf i64:$saved)]> {
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let Size = 4;
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}
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} // End Uses = [EXEC], Defs = [EXEC, SCC]
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