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Add optimization bisect opt-in calls for AArch64 passes
Differential Revision: http://reviews.llvm.org/D19394 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267479 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -311,6 +311,9 @@ public:
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//===----------------------------------------------------------------------===//
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bool AArch64A57FPLoadBalancing::runOnMachineFunction(MachineFunction &F) {
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if (skipFunction(*F.getFunction()))
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return false;
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// Don't do anything if this isn't an A53 or A57.
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if (!(F.getSubtarget<AArch64Subtarget>().isCortexA53() ||
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F.getSubtarget<AArch64Subtarget>().isCortexA57()))
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@ -479,6 +479,9 @@ void AArch64AddressTypePromotion::analyzeSExtension(Instructions &SExtInsts) {
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}
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bool AArch64AddressTypePromotion::runOnFunction(Function &F) {
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if (skipFunction(F))
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return false;
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if (!EnableAddressTypePromotion || F.isDeclaration())
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return false;
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Func = &F;
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@ -402,6 +402,9 @@ bool AArch64AdvSIMDScalar::runOnMachineFunction(MachineFunction &mf) {
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bool Changed = false;
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DEBUG(dbgs() << "***** AArch64AdvSIMDScalar *****\n");
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if (skipFunction(*mf.getFunction()))
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return false;
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MRI = &mf.getRegInfo();
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TII = mf.getSubtarget().getInstrInfo();
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@ -39,6 +39,9 @@ struct LDTLSCleanup : public MachineFunctionPass {
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LDTLSCleanup() : MachineFunctionPass(ID) {}
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bool runOnMachineFunction(MachineFunction &MF) override {
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if (skipFunction(*MF.getFunction()))
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return false;
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AArch64FunctionInfo *AFI = MF.getInfo<AArch64FunctionInfo>();
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if (AFI->getNumLocalDynamicTLSAccesses() < 2) {
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// No point folding accesses if there isn't at least two.
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@ -1041,6 +1041,9 @@ static void collectInvolvedReg(const MachineFunction &MF, MapRegToId &RegToId,
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}
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bool AArch64CollectLOH::runOnMachineFunction(MachineFunction &MF) {
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if (skipFunction(*MF.getFunction()))
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return false;
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const TargetRegisterInfo *TRI = MF.getSubtarget().getRegisterInfo();
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const MachineDominatorTree *MDT = &getAnalysis<MachineDominatorTree>();
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@ -318,6 +318,9 @@ bool AArch64ConditionOptimizer::adjustTo(MachineInstr *CmpMI,
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bool AArch64ConditionOptimizer::runOnMachineFunction(MachineFunction &MF) {
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DEBUG(dbgs() << "********** AArch64 Conditional Compares **********\n"
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<< "********** Function: " << MF.getName() << '\n');
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if (skipFunction(*MF.getFunction()))
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return false;
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TII = MF.getSubtarget().getInstrInfo();
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DomTree = &getAnalysis<MachineDominatorTree>();
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MRI = &MF.getRegInfo();
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@ -889,6 +889,9 @@ bool AArch64ConditionalCompares::tryConvert(MachineBasicBlock *MBB) {
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bool AArch64ConditionalCompares::runOnMachineFunction(MachineFunction &MF) {
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DEBUG(dbgs() << "********** AArch64 Conditional Compares **********\n"
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<< "********** Function: " << MF.getName() << '\n');
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if (skipFunction(*MF.getFunction()))
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return false;
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TII = MF.getSubtarget().getInstrInfo();
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TRI = MF.getSubtarget().getRegisterInfo();
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SchedModel = MF.getSubtarget().getSchedModel();
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@ -149,6 +149,9 @@ bool AArch64DeadRegisterDefinitions::runOnMachineFunction(MachineFunction &MF) {
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bool Changed = false;
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DEBUG(dbgs() << "***** AArch64DeadRegisterDefinitions *****\n");
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if (skipFunction(*MF.getFunction()))
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return false;
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for (auto &MBB : MF)
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if (processMachineBasicBlock(MBB))
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Changed = true;
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@ -1934,6 +1934,9 @@ bool AArch64LoadStoreOpt::enableNarrowLdMerge(MachineFunction &Fn) {
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}
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bool AArch64LoadStoreOpt::runOnMachineFunction(MachineFunction &Fn) {
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if (skipFunction(*Fn.getFunction()))
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return false;
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Subtarget = &static_cast<const AArch64Subtarget &>(Fn.getSubtarget());
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TII = static_cast<const AArch64InstrInfo *>(Subtarget->getInstrInfo());
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TRI = Subtarget->getRegisterInfo();
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@ -109,6 +109,8 @@ public:
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/// global variables with module scope.
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bool runOnModule(Module &M) override {
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DEBUG(dbgs() << getPassName() << '\n');
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if (skipModule(M))
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return false;
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bool Changed = false;
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PromotionCacheTy PromotionCache;
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for (auto &MF : M) {
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@ -167,6 +167,8 @@ bool AArch64RedundantCopyElimination::optimizeCopy(MachineBasicBlock *MBB) {
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bool AArch64RedundantCopyElimination::runOnMachineFunction(
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MachineFunction &MF) {
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if (skipFunction(*MF.getFunction()))
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return false;
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TRI = MF.getSubtarget().getRegisterInfo();
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MRI = &MF.getRegInfo();
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bool Changed = false;
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@ -115,6 +115,9 @@ bool AArch64StorePairSuppress::isNarrowFPStore(const MachineInstr &MI) {
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}
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bool AArch64StorePairSuppress::runOnMachineFunction(MachineFunction &MF) {
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if (skipFunction(*MF.getFunction()))
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return false;
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const TargetSubtargetInfo &ST = MF.getSubtarget();
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TII = static_cast<const AArch64InstrInfo *>(ST.getInstrInfo());
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TRI = ST.getRegisterInfo();
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