[AArch64] Redundant store instructions should be removed as dead code

If there is a store followed by a store with the same value to the same location, then the store is dead/noop. It can be removed.

This problem is found in spec2006-197.parser.

For example,
  stur    w10, [x11, #-4]
  stur    w10, [x11, #-4]
Then one of the two stur instructions can be removed.

Patch by David Xu!



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218569 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
James Molloy 2014-09-27 17:02:54 +00:00
parent af34c3a995
commit aada52189e
2 changed files with 36 additions and 0 deletions

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@ -9858,6 +9858,17 @@ SDValue DAGCombiner::visitSTORE(SDNode *N) {
}
}
// If this is a store followed by a store with the same value to the same
// location, then the store is dead/noop.
if (StoreSDNode *ST1 = dyn_cast<StoreSDNode>(Chain)) {
if (ST1->getBasePtr() == Ptr && ST->getMemoryVT() == ST1->getMemoryVT() &&
ST1->getValue() == Value && ST->isUnindexed() && !ST->isVolatile() &&
ST1->isUnindexed() && !ST1->isVolatile()) {
// The store is dead, remove it.
return Chain;
}
}
// If this is an FP_ROUND or TRUNC followed by a store, fold this into a
// truncating store. We can do this even if this is already a truncstore.
if ((Value.getOpcode() == ISD::FP_ROUND || Value.getOpcode() == ISD::TRUNCATE)

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@ -0,0 +1,25 @@
; RUN: llc -O3 -march=aarch64 < %s | FileCheck %s
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
@end_of_array = common global i8* null, align 8
; CHECK-LABEL: @test
; CHECK: stur
; CHECK-NOT: stur
define i8* @test(i32 %size) {
entry:
%0 = load i8** @end_of_array, align 8
%conv = sext i32 %size to i64
%and = and i64 %conv, -8
%conv2 = trunc i64 %and to i32
%add.ptr.sum = add nsw i64 %and, -4
%add.ptr3 = getelementptr inbounds i8* %0, i64 %add.ptr.sum
%size4 = bitcast i8* %add.ptr3 to i32*
store i32 %conv2, i32* %size4, align 4
%add.ptr.sum9 = add nsw i64 %and, -4
%add.ptr5 = getelementptr inbounds i8* %0, i64 %add.ptr.sum9
%size6 = bitcast i8* %add.ptr5 to i32*
store i32 %conv2, i32* %size6, align 4
ret i8* %0
}