RPCS3/llvm
1
0
Fork 0
mirror of https://github.com/RPCS3/llvm.git synced 2025-02-12 13:48:45 +00:00
Code Issues Actions Packages Projects Releases Wiki Activity

[SystemZ] Improve isFoldableMemAccessOffset().

Browse Source 
A store of an extracted element or a load which gets inserted into a vector,
will be combined into a vector load/store element instruction.

Therefore, isFoldableMemAccessOffset(), which is called by LSR, should
return false in these cases.

Reviewer: Ulrich Weigand

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291673 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Jonas Paulsson 2017-01-11 14:40:39 +00:00
parent a6e44bd635
commit ac6bde281d
1 changed files with 20 additions and 2 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

22
lib/Target/SystemZ/SystemZISelLowering.cpp
View File

@ -547,8 +547,26 @@ bool SystemZTargetLowering::isFoldableMemAccessOffset(Instruction *I,
assert (isa<LoadInst>(I) || isa<StoreInst>(I)); assert (isa<LoadInst>(I) || isa<StoreInst>(I));
Type *MemAccessTy = (isa<LoadInst>(I) ? I->getType() : Type *MemAccessTy = (isa<LoadInst>(I) ? I->getType() :
I->getOperand(0)->getType()); I->getOperand(0)->getType());
if (!isUInt<12>(Offset) && bool IsFPAccess = MemAccessTy->isFloatingPointTy();
(MemAccessTy->isFloatingPointTy() || MemAccessTy->isVectorTy())) bool IsVectorAccess = MemAccessTy->isVectorTy();
// A store of an extracted vector element will be combined into a VSTE type
// instruction.
if (!IsVectorAccess && isa<StoreInst>(I)) {
Value *DataOp = I->getOperand(0);
if (isa<ExtractElementInst>(DataOp))
IsVectorAccess = true;
}
// A load which gets inserted into a vector element will be combined into a
// VLE type instruction.
if (!IsVectorAccess && isa<LoadInst>(I) && I->hasOneUse()) {
User *LoadUser = *I->user_begin();
if (isa<InsertElementInst>(LoadUser))
IsVectorAccess = true;
}
if (!isUInt<12>(Offset) && (IsFPAccess || IsVectorAccess))
return false; return false;
return true; return true;