RPCS3/llvm
1
0
Fork 0
mirror of https://github.com/RPCS3/llvm.git synced 2024-12-14 15:39:06 +00:00
Code Issues Actions Packages Projects Releases Wiki Activity

[KnownBits] Add wrapper methods for setting and clear all bits in the underlying APInts in KnownBits.

Browse Source 
This adds routines for reseting KnownBits to unknown, making the value all zeros or all ones. It also adds methods for querying if the value is zero, all ones or unknown.

Differential Revision: https://reviews.llvm.org/D32637

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302262 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Craig Topper 2017-05-05 17:36:09 +00:00
parent dca600b49c
commit ace8b39f82
15 changed files with 70 additions and 54 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
include/llvm/CodeGen/FunctionLoweringInfo.h
View File

@ -249,7 +249,7 @@ public:
void AddLiveOutRegInfo(unsigned Reg, unsigned NumSignBits,
const KnownBits &Known) {
// Only install this information if it tells us something.
if (NumSignBits == 1 && Known.Zero == 0 && Known.One == 0)
if (NumSignBits == 1 && Known.isUnknown())
return;
LiveOutRegInfo.grow(Reg);

33
include/llvm/Support/KnownBits.h
View File

@ -59,6 +59,39 @@ public:
return One;
}
/// Returns true if we don't know any bits.
bool isUnknown() const { return Zero.isNullValue() && One.isNullValue(); }
/// Resets the known state of all bits.
void resetAll() {
Zero.clearAllBits();
One.clearAllBits();
}
/// Returns true if value is all zero.
bool isZero() const {
assert(!hasConflict() && "KnownBits conflict!");
return Zero.isAllOnesValue();
}
/// Returns true if value is all one bits.
bool isAllOnes() const {
assert(!hasConflict() && "KnownBits conflict!");
return One.isAllOnesValue();
}
/// Make all bits known to be zero and discard any previous information.
void setAllZero() {
Zero.setAllBits();
One.clearAllBits();
}
/// Make all bits known to be one and discard any previous information.
void setAllOnes() {
Zero.clearAllBits();
One.setAllBits();
}
/// Returns true if this value is known to be negative.
bool isNegative() const { return One.isSignBitSet(); }

4
lib/Analysis/Lint.cpp
View File

@ -537,7 +537,7 @@ static bool isZero(Value *V, const DataLayout &DL, DominatorTree *DT,
unsigned BitWidth = V->getType()->getIntegerBitWidth();
KnownBits Known(BitWidth);
computeKnownBits(V, Known, DL, 0, AC, dyn_cast<Instruction>(V), DT);
return Known.Zero.isAllOnesValue();
return Known.isZero();
}
// Per-component check doesn't work with zeroinitializer
@ -558,7 +558,7 @@ static bool isZero(Value *V, const DataLayout &DL, DominatorTree *DT,
KnownBits Known(BitWidth);
computeKnownBits(Elem, Known, DL);
if (Known.Zero.isAllOnesValue())
if (Known.isZero())
return true;
}

50
lib/Analysis/ValueTracking.cpp
View File

@ -342,7 +342,6 @@ static void computeKnownBitsMul(const Value *Op0, const Value *Op1, bool NSW,
// Also compute a conservative estimate for high known-0 bits.
// More trickiness is possible, but this is sufficient for the
// interesting case of alignment computation.
Known.One.clearAllBits();
unsigned TrailZ = Known.Zero.countTrailingOnes() +
Known2.Zero.countTrailingOnes();
unsigned LeadZ = std::max(Known.Zero.countLeadingOnes() +
@ -351,7 +350,7 @@ static void computeKnownBitsMul(const Value *Op0, const Value *Op1, bool NSW,
TrailZ = std::min(TrailZ, BitWidth);
LeadZ = std::min(LeadZ, BitWidth);
Known.Zero.clearAllBits();
Known.resetAll();
Known.Zero.setLowBits(TrailZ);
Known.Zero.setHighBits(LeadZ);
@ -529,15 +528,13 @@ static void computeKnownBitsFromAssume(const Value *V, KnownBits &Known,
if (Arg == V && isValidAssumeForContext(I, Q.CxtI, Q.DT)) {
assert(BitWidth == 1 && "assume operand is not i1?");
Known.Zero.clearAllBits();
Known.One.setAllBits();
Known.setAllOnes();
return;
}
if (match(Arg, m_Not(m_Specific(V))) &&
isValidAssumeForContext(I, Q.CxtI, Q.DT)) {
assert(BitWidth == 1 && "assume operand is not i1?");
Known.Zero.setAllBits();
Known.One.clearAllBits();
Known.setAllZero();
return;
}
@ -719,7 +716,7 @@ static void computeKnownBitsFromAssume(const Value *V, KnownBits &Known,
KnownBits RHSKnown(BitWidth);
computeKnownBits(A, RHSKnown, Depth+1, Query(Q, I));
if (RHSKnown.One.isAllOnesValue() || RHSKnown.isNonNegative()) {
if (RHSKnown.isAllOnes() || RHSKnown.isNonNegative()) {
// We know that the sign bit is zero.
Known.makeNonNegative();
}
@ -741,7 +738,7 @@ static void computeKnownBitsFromAssume(const Value *V, KnownBits &Known,
KnownBits RHSKnown(BitWidth);
computeKnownBits(A, RHSKnown, Depth+1, Query(Q, I));
if (RHSKnown.Zero.isAllOnesValue() || RHSKnown.isNegative()) {
if (RHSKnown.isZero() || RHSKnown.isNegative()) {
// We know that the sign bit is one.
Known.makeNegative();
}
@ -776,8 +773,7 @@ static void computeKnownBitsFromAssume(const Value *V, KnownBits &Known,
// behavior, or we might have a bug in the compiler. We can't assert/crash, so
// clear out the known bits, try to warn the user, and hope for the best.
if (Known.Zero.intersects(Known.One)) {
Known.Zero.clearAllBits();
Known.One.clearAllBits();
Known.resetAll();
if (Q.ORE) {
auto *CxtI = const_cast<Instruction *>(Q.CxtI);
@ -813,10 +809,8 @@ static void computeKnownBitsFromShiftOperator(
// If there is conflict between Known.Zero and Known.One, this must be an
// overflowing left shift, so the shift result is undefined. Clear Known
// bits so that other code could propagate this undef.
if ((Known.Zero & Known.One) != 0) {
Known.Zero.clearAllBits();
Known.One.clearAllBits();
}
if ((Known.Zero & Known.One) != 0)
Known.resetAll();
return;
}
@ -826,8 +820,7 @@ static void computeKnownBitsFromShiftOperator(
// If the shift amount could be greater than or equal to the bit-width of the LHS, the
// value could be undef, so we don't know anything about it.
if ((~Known.Zero).uge(BitWidth)) {
Known.Zero.clearAllBits();
Known.One.clearAllBits();
Known.resetAll();
return;
}
@ -839,8 +832,7 @@ static void computeKnownBitsFromShiftOperator(
// It would be more-clearly correct to use the two temporaries for this
// calculation. Reusing the APInts here to prevent unnecessary allocations.
Known.Zero.clearAllBits();
Known.One.clearAllBits();
Known.resetAll();
// If we know the shifter operand is nonzero, we can sometimes infer more
// known bits. However this is expensive to compute, so be lazy about it and
@ -886,10 +878,8 @@ static void computeKnownBitsFromShiftOperator(
// return anything we'd like, but we need to make sure the sets of known bits
// stay disjoint (it should be better for some other code to actually
// propagate the undef than to pick a value here using known bits).
if (Known.Zero.intersects(Known.One)) {
Known.Zero.clearAllBits();
Known.One.clearAllBits();
}
if (Known.Zero.intersects(Known.One))
Known.resetAll();
}
static void computeKnownBitsFromOperator(const Operator *I, KnownBits &Known,
@ -924,7 +914,7 @@ static void computeKnownBitsFromOperator(const Operator *I, KnownBits &Known,
m_Value(Y))) ||
match(I->getOperand(1), m_Add(m_Specific(I->getOperand(0)),
m_Value(Y))))) {
Known2.Zero.clearAllBits(); Known2.One.clearAllBits();
Known2.resetAll();
computeKnownBits(Y, Known2, Depth + 1, Q);
if (Known2.One.countTrailingOnes() > 0)
Known.Zero.setBit(0);
@ -965,8 +955,7 @@ static void computeKnownBitsFromOperator(const Operator *I, KnownBits &Known,
computeKnownBits(I->getOperand(0), Known2, Depth + 1, Q);
unsigned LeadZ = Known2.Zero.countLeadingOnes();
Known2.One.clearAllBits();
Known2.Zero.clearAllBits();
Known2.resetAll();
computeKnownBits(I->getOperand(1), Known2, Depth + 1, Q);
unsigned RHSUnknownLeadingOnes = Known2.One.countLeadingZeros();
if (RHSUnknownLeadingOnes != BitWidth)
@ -1198,8 +1187,7 @@ static void computeKnownBitsFromOperator(const Operator *I, KnownBits &Known,
unsigned Leaders = std::max(Known.Zero.countLeadingOnes(),
Known2.Zero.countLeadingOnes());
Known.One.clearAllBits();
Known.Zero.clearAllBits();
Known.resetAll();
Known.Zero.setHighBits(Leaders);
break;
}
@ -1500,8 +1488,7 @@ void computeKnownBits(const Value *V, KnownBits &Known, unsigned Depth,
}
// Null and aggregate-zero are all-zeros.
if (isa<ConstantPointerNull>(V) || isa<ConstantAggregateZero>(V)) {
Known.One.clearAllBits();
Known.Zero.setAllBits();
Known.setAllZero();
return;
}
// Handle a constant vector by taking the intersection of the known bits of
@ -1528,8 +1515,7 @@ void computeKnownBits(const Value *V, KnownBits &Known, unsigned Depth,
Constant *Element = CV->getAggregateElement(i);
auto *ElementCI = dyn_cast_or_null<ConstantInt>(Element);
if (!ElementCI) {
Known.Zero.clearAllBits();
Known.One.clearAllBits();
Known.resetAll();
return;
}
Elt = ElementCI->getValue();
@ -1540,7 +1526,7 @@ void computeKnownBits(const Value *V, KnownBits &Known, unsigned Depth,
}
// Start out not knowing anything.
Known.Zero.clearAllBits(); Known.One.clearAllBits();
Known.resetAll();
// We can't imply anything about undefs.
if (isa<UndefValue>(V))

9
lib/CodeGen/SelectionDAG/SelectionDAG.cpp
View File

@ -2044,8 +2044,7 @@ void SelectionDAG::computeKnownBits(SDValue Op, KnownBits &Known,
if (M < 0) {
// For UNDEF elements, we don't know anything about the common state of
// the shuffle result.
Known.One.clearAllBits();
Known.Zero.clearAllBits();
Known.resetAll();
DemandedLHS.clearAllBits();
DemandedRHS.clearAllBits();
break;
@ -2218,14 +2217,13 @@ void SelectionDAG::computeKnownBits(SDValue Op, KnownBits &Known,
// Also compute a conservative estimate for high known-0 bits.
// More trickiness is possible, but this is sufficient for the
// interesting case of alignment computation.
Known.One.clearAllBits();
unsigned TrailZ = Known.Zero.countTrailingOnes() +
Known2.Zero.countTrailingOnes();
unsigned LeadZ = std::max(Known.Zero.countLeadingOnes() +
Known2.Zero.countLeadingOnes(),
BitWidth) - BitWidth;
Known.Zero.clearAllBits();
Known.resetAll();
Known.Zero.setLowBits(std::min(TrailZ, BitWidth));
Known.Zero.setHighBits(std::min(LeadZ, BitWidth));
break;
@ -2598,8 +2596,7 @@ void SelectionDAG::computeKnownBits(SDValue Op, KnownBits &Known,
uint32_t Leaders = std::max(Known.Zero.countLeadingOnes(),
Known2.Zero.countLeadingOnes());
Known.One.clearAllBits();
Known.Zero.clearAllBits();
Known.resetAll();
Known.Zero.setHighBits(Leaders);
break;
}

2
lib/CodeGen/SelectionDAG/TargetLowering.cpp
View File

@ -1303,7 +1303,7 @@ void TargetLowering::computeKnownBitsForTargetNode(const SDValue Op,
Op.getOpcode() == ISD::INTRINSIC_VOID) &&
"Should use MaskedValueIsZero if you don't know whether Op"
" is a target node!");
Known.Zero.clearAllBits(); Known.One.clearAllBits();
Known.resetAll();
}
/// This method can be implemented by targets that want to expose additional

2
lib/Target/AMDGPU/AMDGPUISelLowering.cpp
View File

@ -3580,7 +3580,7 @@ void AMDGPUTargetLowering::computeKnownBitsForTargetNode(
const SDValue Op, KnownBits &Known,
const APInt &DemandedElts, const SelectionDAG &DAG, unsigned Depth) const {
Known.Zero.clearAllBits(); Known.One.clearAllBits(); // Don't know anything.
Known.resetAll(); // Don't know anything.
KnownBits Known2;
unsigned Opc = Op.getOpcode();

5
lib/Target/ARM/ARMISelLowering.cpp
View File

@ -12640,7 +12640,7 @@ void ARMTargetLowering::computeKnownBitsForTargetNode(const SDValue Op,
const SelectionDAG &DAG,
unsigned Depth) const {
unsigned BitWidth = Known.getBitWidth();
Known.Zero.clearAllBits(); Known.One.clearAllBits();
Known.resetAll();
switch (Op.getOpcode()) {
default: break;
case ARMISD::ADDC:
@ -12655,7 +12655,8 @@ void ARMTargetLowering::computeKnownBitsForTargetNode(const SDValue Op,
case ARMISD::CMOV: {
// Bits are known zero/one if known on the LHS and RHS.
DAG.computeKnownBits(Op.getOperand(0), Known, Depth+1);
if (Known.Zero == 0 && Known.One == 0) return;
if (Known.isUnknown())
return;
KnownBits KnownRHS;
DAG.computeKnownBits(Op.getOperand(1), KnownRHS, Depth+1);

2
lib/Target/PowerPC/PPCISelLowering.cpp
View File

@ -12031,7 +12031,7 @@ void PPCTargetLowering::computeKnownBitsForTargetNode(const SDValue Op,
const APInt &DemandedElts,
const SelectionDAG &DAG,
unsigned Depth) const {
Known.Zero.clearAllBits(); Known.One.clearAllBits();
Known.resetAll();
switch (Op.getOpcode()) {
default: break;
case PPCISD::LBRX: {

2
lib/Target/Sparc/SparcISelLowering.cpp
View File

@ -1881,7 +1881,7 @@ void SparcTargetLowering::computeKnownBitsForTargetNode
const SelectionDAG &DAG,
unsigned Depth) const {
KnownBits Known2;
Known.Zero.clearAllBits(); Known.One.clearAllBits();
Known.resetAll();
switch (Op.getOpcode()) {
default: break;

4
lib/Target/X86/X86ISelLowering.cpp
View File

@ -26614,7 +26614,7 @@ void X86TargetLowering::computeKnownBitsForTargetNode(const SDValue Op,
"Should use MaskedValueIsZero if you don't know whether Op"
" is a target node!");
Known.Zero.clearAllBits(); Known.One.clearAllBits();
Known.resetAll();
switch (Opc) {
default: break;
case X86ISD::ADD:
@ -26644,7 +26644,7 @@ void X86TargetLowering::computeKnownBitsForTargetNode(const SDValue Op,
case X86ISD::VSRLI: {
if (auto *ShiftImm = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
if (ShiftImm->getAPIntValue().uge(VT.getScalarSizeInBits())) {
Known.Zero.setAllBits();
Known.setAllZero();
break;
}

2
lib/Target/XCore/XCoreISelLowering.cpp
View File

@ -1825,7 +1825,7 @@ void XCoreTargetLowering::computeKnownBitsForTargetNode(const SDValue Op,
const APInt &DemandedElts,
const SelectionDAG &DAG,
unsigned Depth) const {
Known.Zero.clearAllBits(); Known.One.clearAllBits();
Known.resetAll();
switch (Op.getOpcode()) {
default: break;
case XCoreISD::LADD:

2
lib/Transforms/InstCombine/InstCombineCalls.cpp
View File

@ -3619,7 +3619,7 @@ Instruction *InstCombiner::visitCallInst(CallInst &CI) {
// then this one is redundant, and should be removed.
KnownBits Known(1);
computeKnownBits(IIOperand, Known, 0, II);
if (Known.One.isAllOnesValue())
if (Known.isAllOnes())
return eraseInstFromFunction(*II);
// Update the cache of affected values for this assumption (we might be

2
lib/Transforms/InstCombine/InstCombineCompares.cpp
View File

@ -4050,7 +4050,7 @@ Instruction *InstCombiner::foldICmpUsingKnownBits(ICmpInst &I) {
// is set. If the comparison is against zero, then this is a check to see if
// *that* bit is set.
APInt Op0KnownZeroInverted = ~Op0Known.Zero;
if (~Op1Known.Zero == 0) {
if (Op1Known.isZero()) {
// If the LHS is an AND with the same constant, look through it.
Value *LHS = nullptr;
const APInt *LHSC;

3
lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp
View File

@ -120,8 +120,7 @@ Value *InstCombiner::SimplifyDemandedUseBits(Value *V, APInt DemandedMask,
return nullptr;
}
Known.Zero.clearAllBits();
Known.One.clearAllBits();
Known.resetAll();
if (DemandedMask == 0) // Not demanding any bits from V.
return UndefValue::get(VTy);