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X86: FrameIndex addressing modes do have a base register.
When selecting the DAG (add (WrapperRIP ...), (FrameIndex ...)), X86 code had spotted the FrameIndex possibility and was working out whether it could fold the WrapperRIP into this. The test for forming a %rip version is notionally whether we already have a base or index register (%rip precludes both), but we were forgetting to account for the register that would be inserted later to access the frame. rdar://problem/15024520 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190995 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -79,7 +79,8 @@ namespace {
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}
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bool hasBaseOrIndexReg() const {
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return IndexReg.getNode() != 0 || Base_Reg.getNode() != 0;
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return BaseType == FrameIndexBase ||
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IndexReg.getNode() != 0 || Base_Reg.getNode() != 0;
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}
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/// isRIPRelative - Return true if this addressing mode is already RIP
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22
test/CodeGen/X86/frame-base.ll
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22
test/CodeGen/X86/frame-base.ll
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@ -0,0 +1,22 @@
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; RUN: llc -mtriple=x86_64-apple-macosx -o - %s | FileCheck %s
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; The issue here was a conflict between forming a %rip-relative lea and a
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; FrameIndex lea. The %rip sanity-checks didn't consider that a base register
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; had been set if we'd already matched a FrameIndex, when it has in reality.
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@var = global i32 0
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define void @test_frame_rip_conflict() {
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; CHECK-LABEL: test_frame_rip_conflict:
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; CHECK: leaq _var(%rip), [[TMPADDR:%r.*]]
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; CHECK: leaq {{-?[0-9]+}}(%rsp,[[TMPADDR]]),
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%stackvar = alloca i32
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%stackint = ptrtoint i32* %stackvar to i64
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%addr = add i64 ptrtoint(i32* @var to i64), %stackint
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call void @eat_i64(i64 %addr)
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ret void
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}
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declare void @eat_i64(i64)
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