RPCS3/llvm
1
0
Fork 0
mirror of https://github.com/RPCS3/llvm.git synced 2024-11-27 21:50:29 +00:00
Code Issues Actions Packages Projects Releases Wiki Activity

Change TII isCopyInstr way of returning arguments(NFC)

Browse Source 
Make TII isCopyInstr() return MachineOperands through pointer to pointer
instead via reference.

Patch by Nikola Prica.

Differential Revision: https://reviews.llvm.org/D47364


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334105 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Petar Jovanovic 2018-06-06 16:36:30 +00:00
parent a0a79b9927
commit adb3fd7c76
9 changed files with 36 additions and 31 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

5
include/llvm/CodeGen/TargetInstrInfo.h
View File

@ -849,8 +849,9 @@ public:
/// If the specific machine instruction is a instruction that moves/copies
/// value from one register to another register return true along with
/// @Source machine operand and @Destination machine operand.
virtual bool isCopyInstr(const MachineInstr &MI, MachineOperand &Source,
MachineOperand &Destination) const {
virtual bool isCopyInstr(const MachineInstr &MI,
const MachineOperand *&SourceOpNum,
const MachineOperand *&Destination) const {
return false;
}

9
lib/Target/ARM/ARMBaseInstrInfo.cpp
View File

@ -935,8 +935,9 @@ void ARMBaseInstrInfo::copyPhysReg(MachineBasicBlock &MBB,
Mov->addRegisterKilled(SrcReg, TRI);
}
bool ARMBaseInstrInfo::isCopyInstr(const MachineInstr &MI, MachineOperand &Src,
MachineOperand &Dest) const {
bool ARMBaseInstrInfo::isCopyInstr(const MachineInstr &MI,
const MachineOperand *&Src,
const MachineOperand *&Dest) const {
// VMOVRRD is also a copy instruction but it requires
// special way of handling. It is more complex copy version
// and since that we are not considering it. For recognition
@ -948,8 +949,8 @@ bool ARMBaseInstrInfo::isCopyInstr(const MachineInstr &MI, MachineOperand &Src,
(MI.getOpcode() == ARM::VORRq &&
MI.getOperand(1).getReg() != MI.getOperand(2).getReg()))
return false;
Dest = MI.getOperand(0);
Src = MI.getOperand(1);
Dest = &MI.getOperand(0);
Src = &MI.getOperand(1);
return true;
}

4
lib/Target/ARM/ARMBaseInstrInfo.h
View File

@ -201,8 +201,8 @@ public:
const DebugLoc &DL, unsigned DestReg, unsigned SrcReg,
bool KillSrc) const override;
bool isCopyInstr(const MachineInstr &MI, MachineOperand &Src,
MachineOperand &Dest) const override;
bool isCopyInstr(const MachineInstr &MI, const MachineOperand *&Src,
const MachineOperand *&Dest) const override;
void storeRegToStackSlot(MachineBasicBlock &MBB,
MachineBasicBlock::iterator MBBI,

9
lib/Target/Mips/Mips16InstrInfo.cpp
View File

@ -97,11 +97,12 @@ void Mips16InstrInfo::copyPhysReg(MachineBasicBlock &MBB,
MIB.addReg(SrcReg, getKillRegState(KillSrc));
}
bool Mips16InstrInfo::isCopyInstr(const MachineInstr &MI, MachineOperand &Src,
MachineOperand &Dest) const {
bool Mips16InstrInfo::isCopyInstr(const MachineInstr &MI,
const MachineOperand *&Src,
const MachineOperand *&Dest) const {
if (MI.isMoveReg()) {
Dest = MI.getOperand(0);
Src = MI.getOperand(1);
Dest = &MI.getOperand(0);
Src = &MI.getOperand(1);
return true;
}
return false;

4
lib/Target/Mips/Mips16InstrInfo.h
View File

@ -53,8 +53,8 @@ public:
const DebugLoc &DL, unsigned DestReg, unsigned SrcReg,
bool KillSrc) const override;
bool isCopyInstr(const MachineInstr &MI, MachineOperand &Src,
MachineOperand &Dest) const override;
bool isCopyInstr(const MachineInstr &MI, const MachineOperand *&Src,
const MachineOperand *&Dest) const override;
void storeRegToStack(MachineBasicBlock &MBB,
MachineBasicBlock::iterator MBBI,

19
lib/Target/Mips/MipsSEInstrInfo.cpp
View File

@ -211,25 +211,26 @@ static bool isReadOrWritToDSPReg(const MachineInstr &MI, bool &isWrite) {
/// We check for the common case of 'or', as it's MIPS' preferred instruction
/// for GPRs but we have to check the operands to ensure that is the case.
/// Other move instructions for MIPS are directly identifiable.
bool MipsSEInstrInfo::isCopyInstr(const MachineInstr &MI, MachineOperand &Src,
MachineOperand &Dest) const {
bool MipsSEInstrInfo::isCopyInstr(const MachineInstr &MI,
const MachineOperand *&Src,
const MachineOperand *&Dest) const {
bool isDSPControlWrite = false;
// Condition is made to match the creation of WRDSP/RDDSP copy instruction
// from copyPhysReg function.
if (isReadOrWritToDSPReg(MI, isDSPControlWrite)) {
if (!MI.getOperand(1).isImm() || !(MI.getOperand(1).getImm() == (1<<4)))
if (!MI.getOperand(1).isImm() || MI.getOperand(1).getImm() != (1<<4))
return false;
else if (isDSPControlWrite) {
Src = MI.getOperand(0);
Dest = MI.getOperand(2);
Src = &MI.getOperand(0);
Dest = &MI.getOperand(2);
} else {
Dest = MI.getOperand(0);
Src = MI.getOperand(2);
Dest = &MI.getOperand(0);
Src = &MI.getOperand(2);
}
return true;
} else if (MI.isMoveReg() || isORCopyInst(MI)) {
Dest = MI.getOperand(0);
Src = MI.getOperand(1);
Dest = &MI.getOperand(0);
Src = &MI.getOperand(1);
return true;
}
return false;

4
lib/Target/Mips/MipsSEInstrInfo.h
View File

@ -47,8 +47,8 @@ public:
const DebugLoc &DL, unsigned DestReg, unsigned SrcReg,
bool KillSrc) const override;
bool isCopyInstr(const MachineInstr &MI, MachineOperand &Src,
MachineOperand &Dest) const override;
bool isCopyInstr(const MachineInstr &MI, const MachineOperand *&Src,
const MachineOperand *&Dest) const override;
void storeRegToStack(MachineBasicBlock &MBB,
MachineBasicBlock::iterator MI,

9
lib/Target/X86/X86InstrInfo.cpp
View File

@ -6852,11 +6852,12 @@ void X86InstrInfo::copyPhysReg(MachineBasicBlock &MBB,
llvm_unreachable("Cannot emit physreg copy instruction");
}
bool X86InstrInfo::isCopyInstr(const MachineInstr &MI, MachineOperand &Src,
MachineOperand &Dest) const {
bool X86InstrInfo::isCopyInstr(const MachineInstr &MI,
const MachineOperand *&Src,
const MachineOperand *&Dest) const {
if (MI.isMoveReg()) {
Dest = MI.getOperand(0);
Src = MI.getOperand(1);
Dest = &MI.getOperand(0);
Src = &MI.getOperand(1);
return true;
}
return false;

4
lib/Target/X86/X86InstrInfo.h
View File

@ -394,8 +394,8 @@ public:
void copyPhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI,
const DebugLoc &DL, unsigned DestReg, unsigned SrcReg,
bool KillSrc) const override;
bool isCopyInstr(const MachineInstr &MI, MachineOperand &Src,
MachineOperand &Dest) const override;
bool isCopyInstr(const MachineInstr &MI, const MachineOperand *&Src,
const MachineOperand *&Dest) const override;
void storeRegToStackSlot(MachineBasicBlock &MBB,
MachineBasicBlock::iterator MI, unsigned SrcReg,
bool isKill, int FrameIndex,