[VectorUtils] add funnel-shifts to the list of vectorizable intrinsics

This just identifies the intrinsics as candidates for vectorization.
It does not mean we will attempt to vectorize under normal conditions
(the test file is forcing vectorization). 

The cost model must be fixed to show that the transform is profitable 
in general.

Allowing vectorization with these intrinsics is required to avoid
potential regressions from canonicalizing to the intrinsics from
generic IR:
https://bugs.llvm.org/show_bug.cgi?id=37417



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346661 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Sanjay Patel
2018-11-12 15:20:14 +00:00
parent 7b8a79a288
commit aeeabb506a
2 changed files with 4 additions and 2 deletions
+2
View File
@@ -47,6 +47,8 @@ bool llvm::isTriviallyVectorizable(Intrinsic::ID ID) {
case Intrinsic::ctpop:
case Intrinsic::ctlz:
case Intrinsic::cttz:
case Intrinsic::fshl:
case Intrinsic::fshr:
case Intrinsic::sqrt: // Begin floating-point.
case Intrinsic::sin:
case Intrinsic::cos:
+2 -2
View File
@@ -1196,7 +1196,7 @@ declare i32 @llvm.fshl.i32 (i32, i32, i32)
define void @fshl_i32(i32 %n, i32* noalias %x, i32* noalias %y, i32 %shAmt) {
; CHECK-LABEL: @fshl_i32(
; CHECK-NOT: call <4 x i32> @llvm.fshl.v4i32(<4 x i32> [[WIDE_LOADX:%.*]], <4 x i32> [[WIDE_LOADY:%.*]], <4 x i32> [[SPLAT:%.*]])
; CHECK: call <4 x i32> @llvm.fshl.v4i32(<4 x i32> [[WIDE_LOADX:%.*]], <4 x i32> [[WIDE_LOADY:%.*]], <4 x i32> [[SPLAT:%.*]])
; CHECK: ret void
entry:
%cmp = icmp sgt i32 %n, 0
@@ -1222,7 +1222,7 @@ declare i32 @llvm.fshr.i32 (i32, i32, i32)
define void @fshr_i32(i32 %n, i32* noalias %x, i32* noalias %y, i32 %shAmt) {
; CHECK-LABEL: @fshr_i32(
; CHECK-NOT: call <4 x i32> @llvm.fshr.v4i32(<4 x i32> [[WIDE_LOADX:%.*]], <4 x i32> [[WIDE_LOADY:%.*]], <4 x i32> [[SPLAT:%.*]])
; CHECK: call <4 x i32> @llvm.fshr.v4i32(<4 x i32> [[WIDE_LOADX:%.*]], <4 x i32> [[WIDE_LOADY:%.*]], <4 x i32> [[SPLAT:%.*]])
; CHECK: ret void
entry:
%cmp = icmp sgt i32 %n, 0