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Fix thumbv5e frame lowering assertion failure.
It is possible that frame pointer is not found in the callee saved info, thus FramePtrSpillFI may be incorrect if we don't check the result of hasFP(MF). Besides, if we enable the stack coloring algorithm, there will be an assertion to ensure the slot is live. But in the test case, %var1 is not live in the prologue of the function, and we will get the assertion failure. Note: There is similar code in ARMFrameLowering.cpp. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175616 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -124,14 +124,17 @@ void Thumb1FrameLowering::emitPrologue(MachineFunction &MF) const {
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unsigned DPRCSOffset = NumBytes - (GPRCS1Size + GPRCS2Size + DPRCSSize);
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unsigned GPRCS2Offset = DPRCSOffset + DPRCSSize;
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unsigned GPRCS1Offset = GPRCS2Offset + GPRCS2Size;
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AFI->setFramePtrSpillOffset(MFI->getObjectOffset(FramePtrSpillFI) + NumBytes);
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bool HasFP = hasFP(MF);
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if (HasFP)
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AFI->setFramePtrSpillOffset(MFI->getObjectOffset(FramePtrSpillFI) +
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NumBytes);
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AFI->setGPRCalleeSavedArea1Offset(GPRCS1Offset);
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AFI->setGPRCalleeSavedArea2Offset(GPRCS2Offset);
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AFI->setDPRCalleeSavedAreaOffset(DPRCSOffset);
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NumBytes = DPRCSOffset;
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// Adjust FP so it point to the stack slot that contains the previous FP.
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if (hasFP(MF)) {
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if (HasFP) {
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AddDefaultPred(BuildMI(MBB, MBBI, dl, TII.get(ARM::tADDrSPi), FramePtr)
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.addFrameIndex(FramePtrSpillFI).addImm(0)
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.setMIFlags(MachineInstr::FrameSetup));
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@ -146,7 +149,7 @@ void Thumb1FrameLowering::emitPrologue(MachineFunction &MF) const {
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emitSPUpdate(MBB, MBBI, TII, dl, *RegInfo, -NumBytes,
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MachineInstr::FrameSetup);
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if (STI.isTargetELF() && hasFP(MF))
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if (STI.isTargetELF() && HasFP)
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MFI->setOffsetAdjustment(MFI->getOffsetAdjustment() -
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AFI->getFramePtrSpillOffset());
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29
test/CodeGen/Thumb/stack-coloring-without-frame-ptr.ll
Normal file
29
test/CodeGen/Thumb/stack-coloring-without-frame-ptr.ll
Normal file
@ -0,0 +1,29 @@
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; RUN: llc < %s -march=thumb -mcpu=arm1022e
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%iterator = type { i8**, i8**, i8**, i8*** }
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%insert_iterator = type { %deque*, %iterator }
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%deque = type { %iterator, %iterator, i8***, i32 }
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define i32 @test_thumbv5e_fp_elim() nounwind optsize {
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entry:
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%var1 = alloca %iterator, align 4
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%var2 = alloca %insert_iterator, align 4
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%var3 = alloca %deque, align 4
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%0 = bitcast %deque* %var3 to i8*
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%1 = bitcast %iterator* %var1 to i8*
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call void @llvm.lifetime.start(i64 16, i8* %1) nounwind
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call void @llvm.memcpy.p0i8.p0i8.i32(i8* %1, i8* %0, i32 16, i32 4, i1 false)
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call void @llvm.lifetime.end(i64 16, i8* %1) nounwind
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%2 = bitcast %insert_iterator* %var2 to i8*
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call void @llvm.lifetime.start(i64 20, i8* %2) nounwind
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ret i32 0
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}
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declare void @llvm.memcpy.p0i8.p0i8.i32(i8* nocapture, i8* nocapture, i32, i32, i1) nounwind
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declare void @llvm.lifetime.start(i64, i8* nocapture) nounwind
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declare void @llvm.lifetime.end(i64, i8* nocapture) nounwind
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