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Allow machine LICM to do its job on SPU.
-return a sensible value for register pressure -add pattern to 'ila' instrucion git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120285 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -181,6 +181,14 @@ namespace llvm {
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virtual bool isLegalAddressingMode(const AddrMode &AM,
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virtual bool isLegalAddressingMode(const AddrMode &AM,
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const Type *Ty) const;
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const Type *Ty) const;
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/// After allocating this many registers, the allocator should feel
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/// register pressure. The value is a somewhat random guess, based on the
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/// number of non callee saved registers in the C calling convention.
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virtual unsigned getRegPressureLimit( const TargetRegisterClass *RC,
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MachineFunction &MF) const{
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return 50;
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}
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};
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};
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}
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}
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@ -416,7 +416,7 @@ multiclass ImmLoadAddress
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def lo: ILARegInst<R32C, symbolLo, imm18>;
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def lo: ILARegInst<R32C, symbolLo, imm18>;
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def lsa: ILAInst<(outs R32C:$rT), (ins symbolLSA:$val),
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def lsa: ILAInst<(outs R32C:$rT), (ins symbolLSA:$val),
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[/* no pattern */]>;
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[(set R32C:$rT, imm18:$val)]>;
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}
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}
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defm ILA : ImmLoadAddress;
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defm ILA : ImmLoadAddress;
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