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Fix the x86 move to/from segment register instructions.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104731 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Kevin Enderby 2010-05-26 20:10:45 +00:00
parent 9af7e9a1b5
commit b106543592
3 changed files with 54 additions and 4 deletions
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16
lib/Target/X86/X86InstrInfo.td
View File

@ -1028,13 +1028,21 @@ def MOV32ao32 : Ii32 <0xA3, RawFrm, (outs offset32:$dst), (ins),
// Moves to and from segment registers
def MOV16rs : I<0x8C, MRMDestReg, (outs GR16:$dst), (ins SEGMENT_REG:$src),
"mov{w}\t{$src, $dst|$dst, $src}", []>;
"mov{w}\t{$src, $dst|$dst, $src}", []>, OpSize;
def MOV32rs : I<0x8C, MRMDestReg, (outs GR32:$dst), (ins SEGMENT_REG:$src),
"mov{l}\t{$src, $dst|$dst, $src}", []>;
def MOV16ms : I<0x8C, MRMDestMem, (outs i16mem:$dst), (ins SEGMENT_REG:$src),
"mov{w}\t{$src, $dst|$dst, $src}", []>;
"mov{w}\t{$src, $dst|$dst, $src}", []>, OpSize;
def MOV32ms : I<0x8C, MRMDestMem, (outs i32mem:$dst), (ins SEGMENT_REG:$src),
"mov{l}\t{$src, $dst|$dst, $src}", []>;
def MOV16sr : I<0x8E, MRMSrcReg, (outs SEGMENT_REG:$dst), (ins GR16:$src),
"mov{w}\t{$src, $dst|$dst, $src}", []>;
"mov{w}\t{$src, $dst|$dst, $src}", []>, OpSize;
def MOV32sr : I<0x8E, MRMSrcReg, (outs SEGMENT_REG:$dst), (ins GR32:$src),
"mov{l}\t{$src, $dst|$dst, $src}", []>;
def MOV16sm : I<0x8E, MRMSrcMem, (outs SEGMENT_REG:$dst), (ins i16mem:$src),
"mov{w}\t{$src, $dst|$dst, $src}", []>;
"mov{w}\t{$src, $dst|$dst, $src}", []>, OpSize;
def MOV32sm : I<0x8E, MRMSrcMem, (outs SEGMENT_REG:$dst), (ins i32mem:$src),
"mov{l}\t{$src, $dst|$dst, $src}", []>;
def MOV8rr_REV : I<0x8A, MRMSrcReg, (outs GR8:$dst), (ins GR8:$src),
"mov{b}\t{$src, $dst|$dst, $src}", []>;

13
lib/Target/X86/X86RegisterInfo.cpp
View File

@ -144,6 +144,19 @@ unsigned X86RegisterInfo::getX86RegNum(unsigned RegNo) {
case X86::XMM7: case X86::XMM15: case X86::MM7:
return 7;
case X86::ES:
return 0;
case X86::CS:
return 1;
case X86::SS:
return 2;
case X86::DS:
return 3;
case X86::FS:
return 4;
case X86::GS:
return 5;
default:
assert(isVirtualRegister(RegNo) && "Unknown physical register!");
llvm_unreachable("Register allocator hasn't allocated reg correctly yet!");

29
test/MC/AsmParser/X86/x86_32-new-encoder.s
View File

@ -302,3 +302,32 @@ retl
// CHECK: fdiv %st(0)
// CHECK: encoding: [0xd8,0xf0]
fdiv %st(0), %st
// radr://8017519
// CHECK: movl %cs, %eax
// CHECK: encoding: [0x8c,0xc8]
movl %cs, %eax
// CHECK: movw %cs, %ax
// CHECK: encoding: [0x66,0x8c,0xc8]
movw %cs, %ax
// CHECK: movl %cs, (%eax)
// CHECK: encoding: [0x8c,0x08]
movl %cs, (%eax)
// CHECK: movw %cs, (%eax)
// CHECK: encoding: [0x66,0x8c,0x08]
movw %cs, (%eax)
// CHECK: movl %eax, %cs
// CHECK: encoding: [0x8e,0xc8]
movl %eax, %cs
// CHECK: movl (%eax), %cs
// CHECK: encoding: [0x8e,0x08]
movl (%eax), %cs
// CHECK: movw (%eax), %cs
// CHECK: encoding: [0x66,0x8e,0x08]
movw (%eax), %cs