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AMDGPU: Override getCFInstrCost

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The default cost was 0 with the assumption that it is predictable.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255796 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Matt Arsenault 2015-12-16 18:37:19 +00:00
parent 8b1351038e
commit b11dd50509
3 changed files with 58 additions and 0 deletions
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11
lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp
View File

@ -81,6 +81,17 @@ unsigned AMDGPUTTIImpl::getMaxInterleaveFactor(unsigned VF) {
return 64;
}
unsigned AMDGPUTTIImpl::getCFInstrCost(unsigned Opcode) {
// XXX - For some reason this isn't called for switch.
switch (Opcode) {
case Instruction::Br:
case Instruction::Ret:
return 10;
default:
return BaseT::getCFInstrCost(Opcode);
}
}
int AMDGPUTTIImpl::getVectorInstrCost(unsigned Opcode, Type *ValTy,
unsigned Index) {
switch (Opcode) {

2
lib/Target/AMDGPU/AMDGPUTargetTransformInfo.h
View File

@ -61,6 +61,8 @@ public:
unsigned getRegisterBitWidth(bool Vector);
unsigned getMaxInterleaveFactor(unsigned VF);
unsigned getCFInstrCost(unsigned Opcode);
int getVectorInstrCost(unsigned Opcode, Type *ValTy, unsigned Index);
bool isSourceOfDivergence(const Value *V) const;
};

45
test/Analysis/CostModel/AMDGPU/br.ll Normal file
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@ -0,0 +1,45 @@
; RUN: opt -cost-model -analyze -mtriple=amdgcn-unknown-amdhsa < %s | FileCheck %s
; CHECK: 'test_br_cost'
; CHECK: estimated cost of 10 for instruction: br i1
; CHECK: estimated cost of 10 for instruction: br label
; CHECK: estimated cost of 10 for instruction: ret void
define void @test_br_cost(i32 addrspace(1)* %out, i32 addrspace(1)* %vaddr, i32 %b) #0 {
bb0:
br i1 undef, label %bb1, label %bb2
bb1:
%vec = load i32, i32 addrspace(1)* %vaddr
%add = add i32 %vec, %b
store i32 %add, i32 addrspace(1)* %out
br label %bb2
bb2:
ret void
}
; CHECK: 'test_switch_cost'
; CHECK: Unknown cost for instruction: switch
define void @test_switch_cost(i32 %a) #0 {
entry:
switch i32 %a, label %default [
i32 0, label %case0
i32 1, label %case1
]
case0:
store volatile i32 undef, i32 addrspace(1)* undef
ret void
case1:
store volatile i32 undef, i32 addrspace(1)* undef
ret void
default:
store volatile i32 undef, i32 addrspace(1)* undef
ret void
end:
ret void
}