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Don't pass Reloc::Model to places that already have it. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274022 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -1276,13 +1276,10 @@ void ARMBaseInstrInfo::expandMEMCPY(MachineBasicBlock::iterator MBBI) const {
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bool
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ARMBaseInstrInfo::expandPostRAPseudo(MachineBasicBlock::iterator MI) const {
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MachineFunction &MF = *MI->getParent()->getParent();
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Reloc::Model RM = MF.getTarget().getRelocationModel();
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if (MI->getOpcode() == TargetOpcode::LOAD_STACK_GUARD) {
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assert(getSubtarget().getTargetTriple().isOSBinFormatMachO() &&
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"LOAD_STACK_GUARD currently supported only for MachO.");
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expandLoadStackGuard(MI, RM);
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expandLoadStackGuard(MI);
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MI->getParent()->erase(MI);
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return true;
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}
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@ -4110,9 +4107,10 @@ bool ARMBaseInstrInfo::verifyInstruction(const MachineInstr *MI,
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// sequence is needed for other targets.
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void ARMBaseInstrInfo::expandLoadStackGuardBase(MachineBasicBlock::iterator MI,
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unsigned LoadImmOpc,
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unsigned LoadOpc,
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Reloc::Model RM) const {
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unsigned LoadOpc) const {
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MachineBasicBlock &MBB = *MI->getParent();
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const TargetMachine &TM = MBB.getParent()->getTarget();
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Reloc::Model RM = TM.getRelocationModel();
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DebugLoc DL = MI->getDebugLoc();
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unsigned Reg = MI->getOperand(0).getReg();
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const GlobalValue *GV =
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@ -36,8 +36,7 @@ protected:
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explicit ARMBaseInstrInfo(const ARMSubtarget &STI);
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void expandLoadStackGuardBase(MachineBasicBlock::iterator MI,
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unsigned LoadImmOpc, unsigned LoadOpc,
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Reloc::Model RM) const;
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unsigned LoadImmOpc, unsigned LoadOpc) const;
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/// Build the equivalent inputs of a REG_SEQUENCE for the given \p MI
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/// and \p DefIdx.
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@ -349,8 +348,7 @@ private:
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bool verifyInstruction(const MachineInstr *MI,
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StringRef &ErrInfo) const override;
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virtual void expandLoadStackGuard(MachineBasicBlock::iterator MI,
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Reloc::Model RM) const = 0;
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virtual void expandLoadStackGuard(MachineBasicBlock::iterator MI) const = 0;
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void expandMEMCPY(MachineBasicBlock::iterator) const;
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@ -90,21 +90,22 @@ unsigned ARMInstrInfo::getUnindexedOpcode(unsigned Opc) const {
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return 0;
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}
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void ARMInstrInfo::expandLoadStackGuard(MachineBasicBlock::iterator MI,
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Reloc::Model RM) const {
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void ARMInstrInfo::expandLoadStackGuard(MachineBasicBlock::iterator MI) const {
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MachineFunction &MF = *MI->getParent()->getParent();
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const ARMSubtarget &Subtarget = MF.getSubtarget<ARMSubtarget>();
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const TargetMachine &TM = MF.getTarget();
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Reloc::Model RM = TM.getRelocationModel();
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if (!Subtarget.useMovt(MF)) {
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if (RM == Reloc::PIC_)
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expandLoadStackGuardBase(MI, ARM::LDRLIT_ga_pcrel, ARM::LDRi12, RM);
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if (TM.isPositionIndependent())
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expandLoadStackGuardBase(MI, ARM::LDRLIT_ga_pcrel, ARM::LDRi12);
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else
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expandLoadStackGuardBase(MI, ARM::LDRLIT_ga_abs, ARM::LDRi12, RM);
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expandLoadStackGuardBase(MI, ARM::LDRLIT_ga_abs, ARM::LDRi12);
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return;
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}
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if (RM != Reloc::PIC_) {
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expandLoadStackGuardBase(MI, ARM::MOVi32imm, ARM::LDRi12, RM);
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if (!TM.isPositionIndependent()) {
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expandLoadStackGuardBase(MI, ARM::MOVi32imm, ARM::LDRi12);
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return;
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}
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@ -112,7 +113,7 @@ void ARMInstrInfo::expandLoadStackGuard(MachineBasicBlock::iterator MI,
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cast<GlobalValue>((*MI->memoperands_begin())->getValue());
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if (!Subtarget.GVIsIndirectSymbol(GV, RM)) {
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expandLoadStackGuardBase(MI, ARM::MOV_ga_pcrel, ARM::LDRi12, RM);
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expandLoadStackGuardBase(MI, ARM::MOV_ga_pcrel, ARM::LDRi12);
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return;
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}
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@ -39,8 +39,7 @@ public:
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const ARMRegisterInfo &getRegisterInfo() const override { return RI; }
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private:
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void expandLoadStackGuard(MachineBasicBlock::iterator MI,
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Reloc::Model RM) const override;
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void expandLoadStackGuard(MachineBasicBlock::iterator MI) const override;
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};
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}
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@ -118,11 +118,12 @@ loadRegFromStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator I,
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}
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}
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void
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Thumb1InstrInfo::expandLoadStackGuard(MachineBasicBlock::iterator MI,
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Reloc::Model RM) const {
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if (RM == Reloc::PIC_)
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expandLoadStackGuardBase(MI, ARM::tLDRLIT_ga_pcrel, ARM::tLDRi, RM);
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void Thumb1InstrInfo::expandLoadStackGuard(
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MachineBasicBlock::iterator MI) const {
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MachineFunction &MF = *MI->getParent()->getParent();
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const TargetMachine &TM = MF.getTarget();
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if (TM.isPositionIndependent())
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expandLoadStackGuardBase(MI, ARM::tLDRLIT_ga_pcrel, ARM::tLDRi);
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else
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expandLoadStackGuardBase(MI, ARM::tLDRLIT_ga_abs, ARM::tLDRi, RM);
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expandLoadStackGuardBase(MI, ARM::tLDRLIT_ga_abs, ARM::tLDRi);
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}
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@ -54,8 +54,7 @@ public:
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const TargetRegisterInfo *TRI) const override;
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private:
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void expandLoadStackGuard(MachineBasicBlock::iterator MI,
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Reloc::Model RM) const override;
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void expandLoadStackGuard(MachineBasicBlock::iterator MI) const override;
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};
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}
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@ -209,13 +209,13 @@ loadRegFromStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator I,
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ARMBaseInstrInfo::loadRegFromStackSlot(MBB, I, DestReg, FI, RC, TRI);
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}
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void
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Thumb2InstrInfo::expandLoadStackGuard(MachineBasicBlock::iterator MI,
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Reloc::Model RM) const {
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if (RM == Reloc::PIC_)
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expandLoadStackGuardBase(MI, ARM::t2MOV_ga_pcrel, ARM::t2LDRi12, RM);
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void Thumb2InstrInfo::expandLoadStackGuard(
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MachineBasicBlock::iterator MI) const {
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MachineFunction &MF = *MI->getParent()->getParent();
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if (MF.getTarget().isPositionIndependent())
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expandLoadStackGuardBase(MI, ARM::t2MOV_ga_pcrel, ARM::t2LDRi12);
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else
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expandLoadStackGuardBase(MI, ARM::t2MOVi32imm, ARM::t2LDRi12, RM);
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expandLoadStackGuardBase(MI, ARM::t2MOVi32imm, ARM::t2LDRi12);
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}
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void llvm::emitT2RegPlusImmediate(MachineBasicBlock &MBB,
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@ -62,8 +62,7 @@ public:
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const ThumbRegisterInfo &getRegisterInfo() const override { return RI; }
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private:
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void expandLoadStackGuard(MachineBasicBlock::iterator MI,
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Reloc::Model RM) const override;
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void expandLoadStackGuard(MachineBasicBlock::iterator MI) const override;
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};
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/// getITInstrPredicate - Valid only in Thumb2 mode. This function is identical
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