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AMDGPU: Fix unreachable when emitting binary debug info
Copy implementation of applyFixup from AArch64 with AArch64 bits ripped out. Tests will be included with a later commit. Several other problems must be fixed before binary debug info emission will work. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243660 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -71,12 +71,26 @@ void AMDGPUMCObjectWriter::writeObject(MCAssembler &Asm,
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}
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}
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}
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}
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static unsigned getFixupKindNumBytes(unsigned Kind) {
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switch (Kind) {
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case FK_Data_1:
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return 1;
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case FK_Data_2:
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return 2;
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case FK_Data_4:
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return 4;
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case FK_Data_8:
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return 8;
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default:
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llvm_unreachable("Unknown fixup kind!");
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}
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}
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void AMDGPUAsmBackend::applyFixup(const MCFixup &Fixup, char *Data,
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void AMDGPUAsmBackend::applyFixup(const MCFixup &Fixup, char *Data,
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unsigned DataSize, uint64_t Value,
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unsigned DataSize, uint64_t Value,
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bool IsPCRel) const {
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bool IsPCRel) const {
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switch ((unsigned)Fixup.getKind()) {
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switch ((unsigned)Fixup.getKind()) {
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default: llvm_unreachable("Unknown fixup kind");
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case AMDGPU::fixup_si_sopp_br: {
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case AMDGPU::fixup_si_sopp_br: {
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uint16_t *Dst = (uint16_t*)(Data + Fixup.getOffset());
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uint16_t *Dst = (uint16_t*)(Data + Fixup.getOffset());
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*Dst = (Value - 4) / 4;
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*Dst = (Value - 4) / 4;
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@ -96,6 +110,24 @@ void AMDGPUAsmBackend::applyFixup(const MCFixup &Fixup, char *Data,
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*Dst = Value + 4;
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*Dst = Value + 4;
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break;
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break;
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}
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}
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default: {
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// FIXME: Copied from AArch64
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unsigned NumBytes = getFixupKindNumBytes(Fixup.getKind());
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if (!Value)
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return; // Doesn't change encoding.
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MCFixupKindInfo Info = getFixupKindInfo(Fixup.getKind());
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// Shift the value into position.
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Value <<= Info.TargetOffset;
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unsigned Offset = Fixup.getOffset();
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assert(Offset + NumBytes <= DataSize && "Invalid fixup offset!");
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// For each byte of the fragment that the fixup touches, mask in the
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// bits from the fixup value.
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for (unsigned i = 0; i != NumBytes; ++i)
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Data[Offset + i] |= uint8_t((Value >> (i * 8)) & 0xff);
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}
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}
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}
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}
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}
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