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[mips] Modify definitions of floating point multiply-add/sub instructions.
No functionality change. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170073 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -248,6 +248,19 @@ class SW_FT<string opstr, RegisterClass RC, InstrItinClass Itin,
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let DecoderMethod = "DecodeFMem";
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}
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class MADDS_FT<string opstr, RegisterClass RC, InstrItinClass Itin,
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SDPatternOperator OpNode = null_frag> :
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InstSE<(outs RC:$fd), (ins RC:$fr, RC:$fs, RC:$ft),
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!strconcat(opstr, "\t$fd, $fr, $fs, $ft"),
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[(set RC:$fd, (OpNode (fmul RC:$fs, RC:$ft), RC:$fr))], Itin, FrmFR>;
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class NMADDS_FT<string opstr, RegisterClass RC, InstrItinClass Itin,
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SDPatternOperator OpNode = null_frag> :
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InstSE<(outs RC:$fd), (ins RC:$fr, RC:$fs, RC:$ft),
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!strconcat(opstr, "\t$fd, $fr, $fs, $ft"),
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[(set RC:$fd, (fsub fpimm0, (OpNode (fmul RC:$fs, RC:$ft), RC:$fr)))],
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Itin, FrmFR>;
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//===----------------------------------------------------------------------===//
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// Floating Point Instructions
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//===----------------------------------------------------------------------===//
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@ -414,34 +427,38 @@ def FSUB_S : ADDS_FT<"sub.s", FGR32, IIFadd, 0, fsub>, ADDS_FM<0x01, 16>;
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defm FSUB : ADDS_M<"sub.d", IIFadd, 0, fsub>, ADDS_FM<0x01, 17>;
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let Predicates = [HasMips32r2, HasStdEnc] in {
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def MADD_S : FMADDSUB<0x4, 0, "madd.s", fadd, FGR32>;
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def MSUB_S : FMADDSUB<0x5, 0, "msub.s", fsub, FGR32>;
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def MADD_S : MADDS_FT<"madd.s", FGR32, IIFmulSingle, fadd>, MADDS_FM<4, 0>;
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def MSUB_S : MADDS_FT<"msub.s", FGR32, IIFmulSingle, fsub>, MADDS_FM<5, 0>;
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}
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let Predicates = [HasMips32r2, NoNaNsFPMath, HasStdEnc] in {
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def NMADD_S : FNMADDSUB<0x6, 0, "nmadd.s", fadd, FGR32>;
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def NMSUB_S : FNMADDSUB<0x7, 0, "nmsub.s", fsub, FGR32>;
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def NMADD_S : NMADDS_FT<"nmadd.s", FGR32, IIFmulSingle, fadd>, MADDS_FM<6, 0>;
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def NMSUB_S : NMADDS_FT<"nmsub.s", FGR32, IIFmulSingle, fsub>, MADDS_FM<7, 0>;
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}
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let Predicates = [HasMips32r2, NotFP64bit, HasStdEnc] in {
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def MADD_D32 : FMADDSUB<0x4, 1, "madd.d", fadd, AFGR64>;
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def MSUB_D32 : FMADDSUB<0x5, 1, "msub.d", fsub, AFGR64>;
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def MADD_D32 : MADDS_FT<"madd.d", AFGR64, IIFmulDouble, fadd>, MADDS_FM<4, 1>;
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def MSUB_D32 : MADDS_FT<"msub.d", AFGR64, IIFmulDouble, fsub>, MADDS_FM<5, 1>;
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}
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let Predicates = [HasMips32r2, NotFP64bit, NoNaNsFPMath, HasStdEnc] in {
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def NMADD_D32 : FNMADDSUB<0x6, 1, "nmadd.d", fadd, AFGR64>;
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def NMSUB_D32 : FNMADDSUB<0x7, 1, "nmsub.d", fsub, AFGR64>;
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def NMADD_D32 : NMADDS_FT<"nmadd.d", AFGR64, IIFmulDouble, fadd>,
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MADDS_FM<6, 1>;
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def NMSUB_D32 : NMADDS_FT<"nmsub.d", AFGR64, IIFmulDouble, fsub>,
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MADDS_FM<7, 1>;
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}
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let Predicates = [HasMips32r2, IsFP64bit, HasStdEnc], isCodeGenOnly=1 in {
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def MADD_D64 : FMADDSUB<0x4, 1, "madd.d", fadd, FGR64>;
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def MSUB_D64 : FMADDSUB<0x5, 1, "msub.d", fsub, FGR64>;
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def MADD_D64 : MADDS_FT<"madd.d", FGR64, IIFmulDouble, fadd>, MADDS_FM<4, 1>;
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def MSUB_D64 : MADDS_FT<"msub.d", FGR64, IIFmulDouble, fsub>, MADDS_FM<5, 1>;
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}
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let Predicates = [HasMips32r2, IsFP64bit, NoNaNsFPMath, HasStdEnc],
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isCodeGenOnly=1 in {
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def NMADD_D64 : FNMADDSUB<0x6, 1, "nmadd.d", fadd, FGR64>;
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def NMSUB_D64 : FNMADDSUB<0x7, 1, "nmsub.d", fsub, FGR64>;
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def NMADD_D64 : NMADDS_FT<"nmadd.d", FGR64, IIFmulDouble, fadd>,
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MADDS_FM<6, 1>;
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def NMSUB_D64 : NMADDS_FT<"nmsub.d", FGR64, IIFmulDouble, fsub>,
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MADDS_FM<7, 1>;
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}
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//===----------------------------------------------------------------------===//
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@ -406,3 +406,20 @@ class LW_FM<bits<6> op> {
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let Inst{20-16} = rt;
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let Inst{15-0} = addr{15-0};
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}
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class MADDS_FM<bits<3> funct, bits<3> fmt> {
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bits<5> fd;
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bits<5> fr;
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bits<5> fs;
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bits<5> ft;
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bits<32> Inst;
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let Inst{31-26} = 0x13;
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let Inst{25-21} = fr;
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let Inst{20-16} = ft;
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let Inst{15-11} = fs;
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let Inst{10-6} = fd;
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let Inst{5-3} = funct;
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let Inst{2-0} = fmt;
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}
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