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wire up a few more things, down to 4 test failures, all
about handling $stub, lo/hi etc. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119082 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -13,14 +13,12 @@
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#define DEBUG_TYPE "asm-printer"
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#include "PPCInstPrinter.h"
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#include "PPCPredicates.h"
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#include "llvm/MC/MCExpr.h"
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#include "llvm/MC/MCInst.h"
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//#include "llvm/MC/MCAsmInfo.h"
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//#include "llvm/ADT/StringExtras.h"
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#include "llvm/Support/raw_ostream.h"
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#include "PPCGenRegisterNames.inc"
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#include "PPCGenInstrNames.inc"
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using namespace llvm;
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#define GET_INSTRUCTION_NAME
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@ -84,6 +82,34 @@ void PPCInstPrinter::printInst(const MCInst *MI, raw_ostream &O) {
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printInstruction(MI, O);
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}
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void PPCInstPrinter::printPredicateOperand(const MCInst *MI, unsigned OpNo,
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raw_ostream &O,
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const char *Modifier) {
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assert(Modifier && "Must specify 'cc' or 'reg' as predicate op modifier!");
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unsigned Code = MI->getOperand(OpNo).getImm();
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if (StringRef(Modifier) == "cc") {
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switch ((PPC::Predicate)Code) {
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default: assert(0 && "Invalid predicate");
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case PPC::PRED_ALWAYS: return; // Don't print anything for always.
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case PPC::PRED_LT: O << "lt"; return;
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case PPC::PRED_LE: O << "le"; return;
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case PPC::PRED_EQ: O << "eq"; return;
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case PPC::PRED_GE: O << "ge"; return;
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case PPC::PRED_GT: O << "gt"; return;
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case PPC::PRED_NE: O << "ne"; return;
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case PPC::PRED_UN: O << "un"; return;
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case PPC::PRED_NU: O << "nu"; return;
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}
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}
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assert(StringRef(Modifier) == "reg" &&
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"Need to specify 'cc' or 'reg' as predicate op modifier!");
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// Don't print the register for 'always'.
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if (Code == PPC::PRED_ALWAYS) return;
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printOperand(MI, OpNo+1, O);
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}
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void PPCInstPrinter::printS5ImmOperand(const MCInst *MI, unsigned OpNo,
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raw_ostream &O) {
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char Value = MI->getOperand(OpNo).getImm();
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@ -117,20 +143,10 @@ void PPCInstPrinter::printU16ImmOperand(const MCInst *MI, unsigned OpNo,
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void PPCInstPrinter::printS16X4ImmOperand(const MCInst *MI, unsigned OpNo,
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raw_ostream &O) {
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if (MI->getOperand(OpNo).isImm()) {
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if (MI->getOperand(OpNo).isImm())
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O << (short)(MI->getOperand(OpNo).getImm()*4);
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return;
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}
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assert(0 && "Unhandled operand");
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#if 0
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O << "lo16(";
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printOp(MI->getOperand(OpNo), O);
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if (TM.getRelocationModel() == Reloc::PIC_)
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O << "-\"L" << getFunctionNumber() << "$pb\")";
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else
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O << ')';
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#endif
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printOperand(MI, OpNo, O);
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}
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void PPCInstPrinter::printBranchOperand(const MCInst *MI, unsigned OpNo,
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@ -140,10 +156,14 @@ void PPCInstPrinter::printBranchOperand(const MCInst *MI, unsigned OpNo,
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// Branches can take an immediate operand. This is used by the branch
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// selection pass to print $+8, an eight byte displacement from the PC.
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O << "$+" << MI->getOperand(OpNo).getImm()*4;
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O << "$+";
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printAbsAddrOperand(MI, OpNo, O);
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}
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void PPCInstPrinter::printAbsAddrOperand(const MCInst *MI, unsigned OpNo,
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raw_ostream &O) {
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O << (int)MI->getOperand(OpNo).getImm()*4;
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}
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void PPCInstPrinter::printcrbitm(const MCInst *MI, unsigned OpNo,
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@ -42,7 +42,7 @@ public:
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void printOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O);
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void printPredicateOperand(const MCInst *MI, unsigned OpNo,
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raw_ostream &O, const char *Modifier) {}
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raw_ostream &O, const char *Modifier);
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void printS5ImmOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O);
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@ -55,7 +55,7 @@ public:
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void printCallOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O) {
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printOperand(MI, OpNo, O);
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}
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void printAbsAddrOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O) {}
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void printAbsAddrOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O);
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void printcrbitm(const MCInst *MI, unsigned OpNo, raw_ostream &O);
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