diff --git a/lib/CodeGen/PreAllocSplitting.cpp b/lib/CodeGen/PreAllocSplitting.cpp index 33e3e8054ce..09694403e3f 100644 --- a/lib/CodeGen/PreAllocSplitting.cpp +++ b/lib/CodeGen/PreAllocSplitting.cpp @@ -561,6 +561,9 @@ bool PreAllocSplitting::SplitRegLiveInterval(LiveInterval *LI) { SpillMI = prior(SpillPt); LIs->InsertMachineInstrInMaps(SpillMI, SpillIndex); } else if (!PrevSpilled) { + if (!DefMI) + // Def is dead. Do nothing. + return false; // If it's already split, just restore the value. There is no need to spill // the def again. // Check if it's possible to insert a spill after the def MI. diff --git a/lib/CodeGen/SimpleRegisterCoalescing.cpp b/lib/CodeGen/SimpleRegisterCoalescing.cpp index 6eeb21c1bf7..a60939c3010 100644 --- a/lib/CodeGen/SimpleRegisterCoalescing.cpp +++ b/lib/CodeGen/SimpleRegisterCoalescing.cpp @@ -707,6 +707,18 @@ bool SimpleRegisterCoalescing::ShortenDeadCopyLiveRange(LiveInterval &li, return false; } +/// RemoveDeadDef - If a def of a live interval is now determined dead, remove +/// the val# it defines. If the live interval becomes empty, remove it as well. +bool SimpleRegisterCoalescing::RemoveDeadDef(LiveInterval &li, + MachineInstr *DefMI) { + unsigned DefIdx = li_->getDefIndex(li_->getInstructionIndex(DefMI)); + LiveInterval::iterator MLR = li.FindLiveRangeContaining(DefIdx); + if (DefIdx != MLR->valno->def) + return false; + li.removeValNo(MLR->valno); + return removeIntervalIfEmpty(li, li_, tri_); +} + /// PropagateDeadness - Propagate the dead marker to the instruction which /// defines the val#. static void PropagateDeadness(LiveInterval &li, MachineInstr *CopyMI, @@ -2280,6 +2292,7 @@ bool SimpleRegisterCoalescing::runOnMachineFunction(MachineFunction &fn) { // Perform a final pass over the instructions and compute spill weights // and remove identity moves. + SmallVector<unsigned, 4> DeadDefs; for (MachineFunction::iterator mbbi = mf_->begin(), mbbe = mf_->end(); mbbi != mbbe; ++mbbi) { MachineBasicBlock* mbb = mbbi; @@ -2313,9 +2326,13 @@ bool SimpleRegisterCoalescing::runOnMachineFunction(MachineFunction &fn) { bool isDead = true; for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) { const MachineOperand &MO = MI->getOperand(i); - if (!MO.isReg() || MO.isDead()) + if (!MO.isReg()) continue; unsigned Reg = MO.getReg(); + if (TargetRegisterInfo::isVirtualRegister(Reg)) + DeadDefs.push_back(Reg); + if (MO.isDead()) + continue; if (TargetRegisterInfo::isPhysicalRegister(Reg) || !mri_->use_empty(Reg)) { isDead = false; @@ -2323,10 +2340,16 @@ bool SimpleRegisterCoalescing::runOnMachineFunction(MachineFunction &fn) { } } if (isDead) { + while (!DeadDefs.empty()) { + unsigned DeadDef = DeadDefs.back(); + DeadDefs.pop_back(); + RemoveDeadDef(li_->getInterval(DeadDef), MI); + } li_->RemoveMachineInstrFromMaps(mii); mii = mbbi->erase(mii); continue; - } + } else + DeadDefs.clear(); } // If the move will be an identity move delete it diff --git a/lib/CodeGen/SimpleRegisterCoalescing.h b/lib/CodeGen/SimpleRegisterCoalescing.h index 330c476dbf5..abe392990d1 100644 --- a/lib/CodeGen/SimpleRegisterCoalescing.h +++ b/lib/CodeGen/SimpleRegisterCoalescing.h @@ -269,6 +269,11 @@ namespace llvm { /// live range is dead. Return true if live interval is removed. bool ShortenDeadCopySrcLiveRange(LiveInterval &li, MachineInstr *CopyMI); + /// RemoveDeadDef - If a def of a live interval is now determined dead, + /// remove the val# it defines. If the live interval becomes empty, remove + /// it as well. + bool RemoveDeadDef(LiveInterval &li, MachineInstr *DefMI); + /// lastRegisterUse - Returns the last use of the specific register between /// cycles Start and End or NULL if there are no uses. MachineOperand *lastRegisterUse(unsigned Start, unsigned End, unsigned Reg, diff --git a/test/CodeGen/X86/2008-10-27-CoalescerBug.ll b/test/CodeGen/X86/2008-10-27-CoalescerBug.ll new file mode 100644 index 00000000000..2c8e12fb26f --- /dev/null +++ b/test/CodeGen/X86/2008-10-27-CoalescerBug.ll @@ -0,0 +1,44 @@ +; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 -stats |& not grep {Number of register spills} + +define fastcc void @fourn(double* %data, i32 %isign) nounwind { +entry: + br label %bb + +bb: ; preds = %bb, %entry + %indvar93 = phi i32 [ 0, %entry ], [ %idim.030, %bb ] ; <i32> [#uses=2] + %idim.030 = add i32 %indvar93, 1 ; <i32> [#uses=1] + %0 = add i32 %indvar93, 2 ; <i32> [#uses=1] + %1 = icmp sgt i32 %0, 2 ; <i1> [#uses=1] + br i1 %1, label %bb30.loopexit, label %bb + +bb3: ; preds = %bb30.loopexit, %bb25, %bb3 + %2 = load i32* null, align 4 ; <i32> [#uses=1] + %3 = mul i32 %2, 0 ; <i32> [#uses=1] + %4 = icmp slt i32 0, %3 ; <i1> [#uses=1] + br i1 %4, label %bb18, label %bb3 + +bb18: ; preds = %bb3 + %5 = fdiv double %11, 0.000000e+00 ; <double> [#uses=1] + %6 = tail call double @sin(double %5) nounwind readonly ; <double> [#uses=1] + br label %bb24.preheader + +bb22.preheader: ; preds = %bb24.preheader, %bb22.preheader + br label %bb22.preheader + +bb25: ; preds = %bb24.preheader + %7 = mul double 0.000000e+00, %6 ; <double> [#uses=0] + %8 = add i32 %i3.122100, 0 ; <i32> [#uses=1] + %9 = icmp sgt i32 %8, 0 ; <i1> [#uses=1] + br i1 %9, label %bb3, label %bb24.preheader + +bb24.preheader: ; preds = %bb25, %bb18 + %i3.122100 = or i32 0, 1 ; <i32> [#uses=2] + %10 = icmp slt i32 0, %i3.122100 ; <i1> [#uses=1] + br i1 %10, label %bb25, label %bb22.preheader + +bb30.loopexit: ; preds = %bb + %11 = mul double 0.000000e+00, 0x401921FB54442D1C ; <double> [#uses=1] + br label %bb3 +} + +declare double @sin(double) nounwind readonly