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Anyext tweaks for x86. When extloading a value to i32 or i64, choose

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instructions that define the full 32 or 64-bit value. When anyexting
from i8 to i16 or i32, it's not necessary to zero out the high
portion of the register.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55190 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Dan Gohman 2008-08-22 19:19:31 +00:00
parent a794ef7f5d
commit b4ae2da7e4
2 changed files with 16 additions and 17 deletions
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12
lib/Target/X86/X86Instr64bit.td
View File

@ -1254,15 +1254,9 @@ def : Pat<(i64 (zext GR32:$src)),
def : Pat<(zextloadi64i1 addr:$src), (MOVZX64rm8 addr:$src)>;
// extload
def : Pat<(extloadi64i1 addr:$src),
(INSERT_SUBREG (i64 (IMPLICIT_DEF)), (MOV8rm addr:$src),
x86_subreg_8bit)>;
def : Pat<(extloadi64i8 addr:$src),
(INSERT_SUBREG (i64 (IMPLICIT_DEF)), (MOV8rm addr:$src),
x86_subreg_8bit)>;
def : Pat<(extloadi64i16 addr:$src),
(INSERT_SUBREG (i64 (IMPLICIT_DEF)), (MOV16rm addr:$src),
x86_subreg_16bit)>;
def : Pat<(extloadi64i1 addr:$src), (MOVZX64rm8 addr:$src)>;
def : Pat<(extloadi64i8 addr:$src), (MOVZX64rm8 addr:$src)>;
def : Pat<(extloadi64i16 addr:$src), (MOVZX64rm16 addr:$src)>;
def : Pat<(extloadi64i32 addr:$src),
(INSERT_SUBREG (i64 (IMPLICIT_DEF)), (MOV32rm addr:$src),
x86_subreg_32bit)>;

21
lib/Target/X86/X86InstrInfo.td
View File

@ -2784,19 +2784,24 @@ def : Pat<(zextloadi32i1 addr:$src), (MOVZX32rm8 addr:$src)>;
// extload bool -> extload byte
def : Pat<(extloadi8i1 addr:$src), (MOV8rm addr:$src)>;
def : Pat<(extloadi16i1 addr:$src), (MOVZX16rm8 addr:$src)>,
Requires<[In32BitMode]>;
def : Pat<(extloadi16i1 addr:$src),
(INSERT_SUBREG (i16 (IMPLICIT_DEF)), (MOV8rm addr:$src),
x86_subreg_8bit)>;
def : Pat<(extloadi16i8 addr:$src),
(INSERT_SUBREG (i16 (IMPLICIT_DEF)), (MOV8rm addr:$src),
x86_subreg_8bit)>;
// For extloads with 32-bit results, chose instructions that
// define the whole 32 bits of the result, to avoid partial-register
// updates.
def : Pat<(extloadi32i1 addr:$src), (MOVZX32rm8 addr:$src)>;
def : Pat<(extloadi16i8 addr:$src), (MOVZX16rm8 addr:$src)>,
Requires<[In32BitMode]>;
def : Pat<(extloadi32i8 addr:$src), (MOVZX32rm8 addr:$src)>;
def : Pat<(extloadi32i16 addr:$src), (MOVZX32rm16 addr:$src)>;
// anyext
def : Pat<(i16 (anyext GR8 :$src)), (MOVZX16rr8 GR8 :$src)>,
Requires<[In32BitMode]>;
def : Pat<(i32 (anyext GR8 :$src)), (MOVZX32rr8 GR8 :$src)>,
Requires<[In32BitMode]>;
def : Pat<(i16 (anyext GR8:$src)),
(INSERT_SUBREG (i16 (IMPLICIT_DEF)), GR8:$src, x86_subreg_8bit)>;
def : Pat<(i32 (anyext GR8:$src)),
(INSERT_SUBREG (i32 (IMPLICIT_DEF)), GR8:$src, x86_subreg_8bit)>;
def : Pat<(i32 (anyext GR16:$src)),
(INSERT_SUBREG (i32 (IMPLICIT_DEF)), GR16:$src, x86_subreg_16bit)>;