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CXX_FAST_TLS calling convention: fix issue on ARM.
When we have a single basic block, the explicit copy-back instructions should be inserted right before the terminator. Before this fix, they were wrongly placed at the beginning of the basic block. PR26136 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@257930 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -12425,6 +12425,7 @@ void ARMTargetLowering::insertCopiesSplitCSR(
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const TargetInstrInfo *TII = Subtarget->getInstrInfo();
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MachineRegisterInfo *MRI = &Entry->getParent()->getRegInfo();
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MachineBasicBlock::iterator MBBI = Entry->begin();
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for (const MCPhysReg *I = IStart; *I; ++I) {
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const TargetRegisterClass *RC = nullptr;
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if (ARM::GPRRegClass.contains(*I))
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@ -12444,13 +12445,13 @@ void ARMTargetLowering::insertCopiesSplitCSR(
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Attribute::NoUnwind) &&
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"Function should be nounwind in insertCopiesSplitCSR!");
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Entry->addLiveIn(*I);
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BuildMI(*Entry, Entry->begin(), DebugLoc(), TII->get(TargetOpcode::COPY),
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NewVR)
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BuildMI(*Entry, MBBI, DebugLoc(), TII->get(TargetOpcode::COPY), NewVR)
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.addReg(*I);
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// Insert the copy-back instructions right before the terminator.
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for (auto *Exit : Exits)
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BuildMI(*Exit, Exit->begin(), DebugLoc(), TII->get(TargetOpcode::COPY),
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*I)
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BuildMI(*Exit, Exit->getFirstTerminator(), DebugLoc(),
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TII->get(TargetOpcode::COPY), *I)
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.addReg(NewVR);
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}
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}
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@ -8,6 +8,7 @@
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@sg = internal thread_local global %struct.S zeroinitializer, align 1
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@__dso_handle = external global i8
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@__tls_guard = internal thread_local unnamed_addr global i1 false
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@sum1 = internal thread_local global i32 0, align 4
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declare %struct.S* @_ZN1SC1Ev(%struct.S* returned)
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declare %struct.S* @_ZN1SD1Ev(%struct.S* returned)
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@ -44,3 +45,13 @@ __tls_init.exit:
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; CHECK-NOT: pop {r9, r12}
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; CHECK-NOT: pop {r1, r2, r3, r4, r7, pc}
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; CHECK: pop {lr}
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; CHECK-LABEL: _ZTW4sum1
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; CHECK-NOT: push {r1, r2, r3, r4, r7, lr}
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; CHECK-NOT: push {r9, r12}
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; CHECK-NOT: vpush {d16, d17, d18, d19, d20, d21, d22, d23, d24, d25, d26, d27, d28, d29, d30, d31}
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; CHECK-NOT: vpush {d0, d1, d2, d3, d4, d5, d6, d7}
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; CHECK: blx
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define cxx_fast_tlscc nonnull i32* @_ZTW4sum1() nounwind {
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ret i32* @sum1
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}
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