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InstCombine: Reduce "X shift (A srem B)" to "X shift (A urem B)" iff B is positive.
This allows to transform the rem in "1 << ((int)x % 8);" to an and. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120028 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -1698,22 +1698,14 @@ from gcc.
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//===---------------------------------------------------------------------===//
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Missed instcombine transformation:
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define i32 @a(i32 %x) nounwind readnone {
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entry:
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%rem = srem i32 %x, 32
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%shl = shl i32 1, %rem
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ret i32 %shl
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}
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The srem can be transformed to an and because if x is negative, the shift is
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undefined. Here's a more general case that occurs on 64-bit targets:
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%382 = srem i32 %tmp14.i, 64 ; [#uses=1]
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%383 = zext i32 %382 to i64 ; [#uses=1]
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%384 = shl i64 %381, %383 ; [#uses=1]
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%385 = icmp slt i32 %tmp14.i, 64 ; [#uses=1]
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Testcase derived from 403.gcc.
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The srem can be transformed to an and because if x is negative, the shift is
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undefined. Testcase derived from 403.gcc.
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//===---------------------------------------------------------------------===//
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@ -53,6 +53,21 @@ Instruction *InstCombiner::commonShiftTransforms(BinaryOperator &I) {
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if (ConstantInt *CUI = dyn_cast<ConstantInt>(Op1))
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if (Instruction *Res = FoldShiftByConstant(Op0, CUI, I))
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return Res;
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// X shift (A srem B) -> X shift (A urem B) iff B is positive.
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// Because shifts by negative values are undefined.
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if (BinaryOperator *BO = dyn_cast<BinaryOperator>(Op1))
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if (BO->getOpcode() == Instruction::SRem && BO->getType()->isIntegerTy()) {
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// Make sure the divisor's sign bit is zero.
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APInt Mask = APInt::getSignBit(BO->getType()->getPrimitiveSizeInBits());
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if (MaskedValueIsZero(BO->getOperand(1), Mask)) {
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Value *URem = Builder->CreateURem(BO->getOperand(0), BO->getOperand(1),
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BO->getName());
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I.setOperand(1, URem);
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return &I;
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}
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}
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return 0;
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}
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@ -441,3 +441,14 @@ entry:
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; CHECK: %ins = or i128 %tmp23, %A
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; CHECK: %tmp46 = trunc i128 %ins to i64
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}
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define i32 @test38(i32 %x) nounwind readnone {
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entry:
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%rem = srem i32 %x, 32
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%shl = shl i32 1, %rem
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ret i32 %shl
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; CHECK: @test38
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; CHECK-NOT: srem
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; CHECK: ret i32
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}
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