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add a fixup for conditional branches, giving us output like this:

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beq cr0, LBB0_4                 ; encoding: [0x41,0x82,A,0bAAAAAA00]
                                        ;   fixup A - offset: 0, value: LBB0_4, kind: fixup_ppc_brcond14



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119126 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chris Lattner 2010-11-15 06:12:22 +00:00
parent 8d70411dcd
commit b719437325
2 changed files with 11 additions and 8 deletions
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7
lib/Target/PowerPC/PPCFixupKinds.h
View File

@ -15,9 +15,14 @@
namespace llvm {
namespace PPC {
enum Fixups {
// fixup_ppc_br24 - 24-bit PC relative relocation for calls like 'bl'.
// fixup_ppc_br24 - 24-bit PC relative relocation for direct branches like 'b'
// and 'bl'.
fixup_ppc_br24 = FirstTargetFixupKind,
/// fixup_ppc_brcond14 - 14-bit PC relative relocation for conditional
/// branches.
fixup_ppc_brcond14,
// Marker
LastTargetFixupKind,
NumTargetFixupKinds = LastTargetFixupKind - FirstTargetFixupKind

12
lib/Target/PowerPC/PPCMCCodeEmitter.cpp
View File

@ -43,11 +43,8 @@ public:
const MCFixupKindInfo &getFixupKindInfo(MCFixupKind Kind) const {
const static MCFixupKindInfo Infos[] = {
// name offset bits flags
{ "fixup_ppc_br24", 6, 24, MCFixupKindInfo::FKF_IsPCRel }
#if 0
{ "fixup_arm_vfp_pcrel_12", 3, 8, MCFixupKindInfo::FKF_IsPCRel },
{ "fixup_arm_branch", 1, 24, MCFixupKindInfo::FKF_IsPCRel },
#endif
{ "fixup_ppc_br24", 6, 24, MCFixupKindInfo::FKF_IsPCRel },
{ "fixup_ppc_brcond14", 16, 14, MCFixupKindInfo::FKF_IsPCRel }
};
if (Kind < FirstTargetFixupKind)
@ -115,8 +112,9 @@ unsigned PPCMCCodeEmitter::getCondBrEncoding(const MCInst &MI, unsigned OpNo,
const MCOperand &MO = MI.getOperand(OpNo);
if (MO.isReg() || MO.isImm()) return getMachineOpValue(MI, MO, Fixups);
// Add a fixup for the branch target.
Fixups.push_back(MCFixup::Create(0, MO.getExpr(),
(MCFixupKind)PPC::fixup_ppc_brcond14));
return 0;
}