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Revert "Revert r212640, "Add trunc (select c, a, b) -> select c (trunc a), (trunc b) combine.""

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Don't try to convert the select condition type.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@212750 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Matt Arsenault 2014-07-10 18:21:04 +00:00
parent 3996e5290a
commit b730c3d28d
4 changed files with 58 additions and 2 deletions
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13
lib/CodeGen/SelectionDAG/DAGCombiner.cpp
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@ -6022,6 +6022,19 @@ SDValue DAGCombiner::visitTRUNCATE(SDNode *N) {
}
}
// trunc (select c, a, b) -> select c, (trunc a), (trunc b)
if (N0.getOpcode() == ISD::SELECT) {
EVT SrcVT = N0.getValueType();
if ((!LegalOperations || TLI.isOperationLegal(ISD::SELECT, SrcVT)) &&
TLI.isTruncateFree(SrcVT, VT)) {
SDLoc SL(N0);
SDValue Cond = N0.getOperand(0);
SDValue TruncOp0 = DAG.getNode(ISD::TRUNCATE, SL, VT, N0.getOperand(1));
SDValue TruncOp1 = DAG.getNode(ISD::TRUNCATE, SL, VT, N0.getOperand(2));
return DAG.getNode(ISD::SELECT, SDLoc(N), VT, Cond, TruncOp0, TruncOp1);
}
}
// Fold a series of buildvector, bitcast, and truncate if possible.
// For example fold
// (2xi32 trunc (bitcast ((4xi32)buildvector x, x, y, y) 2xi64)) to

35
test/CodeGen/R600/select64.ll
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@ -13,3 +13,38 @@ entry:
store i64 %1, i64 addrspace(1)* %out
ret void
}
; CHECK-LABEL: @select_trunc_i64
; CHECK: V_CNDMASK_B32
; CHECK-NOT: V_CNDMASK_B32
define void @select_trunc_i64(i32 addrspace(1)* %out, i32 %cond, i64 %in) nounwind {
%cmp = icmp ugt i32 %cond, 5
%sel = select i1 %cmp, i64 0, i64 %in
%trunc = trunc i64 %sel to i32
store i32 %trunc, i32 addrspace(1)* %out, align 4
ret void
}
; CHECK-LABEL: @select_trunc_i64_2
; CHECK: V_CNDMASK_B32
; CHECK-NOT: V_CNDMASK_B32
define void @select_trunc_i64_2(i32 addrspace(1)* %out, i32 %cond, i64 %a, i64 %b) nounwind {
%cmp = icmp ugt i32 %cond, 5
%sel = select i1 %cmp, i64 %a, i64 %b
%trunc = trunc i64 %sel to i32
store i32 %trunc, i32 addrspace(1)* %out, align 4
ret void
}
; CHECK-LABEL: @v_select_trunc_i64_2
; CHECK: V_CNDMASK_B32
; CHECK-NOT: V_CNDMASK_B32
define void @v_select_trunc_i64_2(i32 addrspace(1)* %out, i32 %cond, i64 addrspace(1)* %aptr, i64 addrspace(1)* %bptr) nounwind {
%cmp = icmp ugt i32 %cond, 5
%a = load i64 addrspace(1)* %aptr, align 8
%b = load i64 addrspace(1)* %bptr, align 8
%sel = select i1 %cmp, i64 %a, i64 %b
%trunc = trunc i64 %sel to i32
store i32 %trunc, i32 addrspace(1)* %out, align 4
ret void
}

8
test/CodeGen/X86/select.ll
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@ -357,3 +357,11 @@ define i8 @test18(i32 %x, i8 zeroext %a, i8 zeroext %b) nounwind {
; ATOM: cmpl $15, %edi
; ATOM: cmovgel %edx
}
; CHECK-LABEL: @trunc_select_miscompile
; CHECK-NOT: sarb
define i32 @trunc_select_miscompile(i32 %a, i1 zeroext %cc) {
%tmp1 = select i1 %cc, i32 3, i32 2
%tmp2 = shl i32 %a, %tmp1
ret i32 %tmp2
}

4
test/CodeGen/X86/shift-parts.ll
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@ -7,13 +7,13 @@
; CHECK: shrdq
define i32 @int87(i32 %uint64p_8) nounwind {
define i32 @int87(i32 %uint64p_8, i1 %cond) nounwind {
entry:
%srcval4 = load i320* bitcast (%0* @g_144 to i320*), align 8 ; <i320> [#uses=1]
br label %for.cond
for.cond: ; preds = %for.cond, %entry
%call3.in.in.in.v = select i1 undef, i320 192, i320 128 ; <i320> [#uses=1]
%call3.in.in.in.v = select i1 %cond, i320 192, i320 128 ; <i320> [#uses=1]
%call3.in.in.in = lshr i320 %srcval4, %call3.in.in.in.v ; <i320> [#uses=1]
%call3.in = trunc i320 %call3.in.in.in to i32 ; <i32> [#uses=1]
%tobool = icmp eq i32 %call3.in, 0 ; <i1> [#uses=1]