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R600/SI: add shl pattern
Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Tom Stellard <thomas.stellard@amd.com> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@177275 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -229,6 +229,10 @@ EVT SITargetLowering::getSetCCResultType(EVT VT) const {
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return MVT::i1;
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}
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MVT SITargetLowering::getScalarShiftAmountTy(EVT VT) const {
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return MVT::i32;
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}
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//===----------------------------------------------------------------------===//
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// Custom DAG Lowering Operations
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//===----------------------------------------------------------------------===//
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@ -48,6 +48,7 @@ public:
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virtual MachineBasicBlock * EmitInstrWithCustomInserter(MachineInstr * MI,
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MachineBasicBlock * BB) const;
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virtual EVT getSetCCResultType(EVT VT) const;
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virtual MVT getScalarShiftAmountTy(EVT VT) const;
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virtual SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const;
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virtual SDValue PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI) const;
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virtual SDNode *PostISelFolding(MachineSDNode *N, SelectionDAG &DAG) const;
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@ -854,7 +854,9 @@ defm V_LSHR_B32 : VOP2_32 <0x00000015, "V_LSHR_B32", []>;
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defm V_LSHRREV_B32 : VOP2_32 <0x00000016, "V_LSHRREV_B32", []>;
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defm V_ASHR_I32 : VOP2_32 <0x00000017, "V_ASHR_I32", []>;
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defm V_ASHRREV_I32 : VOP2_32 <0x00000018, "V_ASHRREV_I32", []>;
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defm V_LSHL_B32 : VOP2_32 <0x00000019, "V_LSHL_B32", []>;
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defm V_LSHL_B32 : VOP2_32 <0x00000019, "V_LSHL_B32",
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[(set VReg_32:$dst, (shl VSrc_32:$src0, (i32 VReg_32:$src1)))]
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>;
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defm V_LSHLREV_B32 : VOP2_32 <0x0000001a, "V_LSHLREV_B32", []>;
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let isCommutable = 1 in {
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