RPCS3/llvm
1
0
Fork 0
mirror of https://github.com/RPCS3/llvm.git synced 2025-01-09 13:41:47 +00:00
Code Issues Actions Packages Projects Releases Wiki Activity

[x86] Fix uninitialized variable warning in translate{Src,Dst}Index

Browse Source 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199811 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
David Woodhouse 2014-01-22 15:31:29 +00:00
parent a1856c8aa7
commit b92c3984b2
1 changed files with 6 additions and 2 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

8
lib/Target/X86/Disassembler/X86Disassembler.cpp
View File

@ -245,8 +245,10 @@ static bool translateSrcIndex(MCInst &mcInst, InternalInstruction &insn) {
baseRegNo = insn.prefixPresent[0x67] ? X86::ESI : X86::RSI;
else if (insn.mode == MODE_32BIT)
baseRegNo = insn.prefixPresent[0x67] ? X86::SI : X86::ESI;
else if (insn.mode == MODE_16BIT)
else {
assert(insn.mode == MODE_16BIT);
baseRegNo = insn.prefixPresent[0x67] ? X86::ESI : X86::SI;
}
MCOperand baseReg = MCOperand::CreateReg(baseRegNo);
mcInst.addOperand(baseReg);
@ -269,8 +271,10 @@ static bool translateDstIndex(MCInst &mcInst, InternalInstruction &insn) {
baseRegNo = insn.prefixPresent[0x67] ? X86::EDI : X86::RDI;
else if (insn.mode == MODE_32BIT)
baseRegNo = insn.prefixPresent[0x67] ? X86::DI : X86::EDI;
else if (insn.mode == MODE_16BIT)
else {
assert(insn.mode == MODE_16BIT);
baseRegNo = insn.prefixPresent[0x67] ? X86::EDI : X86::DI;
}
MCOperand baseReg = MCOperand::CreateReg(baseRegNo);
mcInst.addOperand(baseReg);
return false;