RPCS3/llvm
1
0
Fork 0
mirror of https://github.com/RPCS3/llvm.git synced 2025-01-31 15:53:42 +00:00
Code Issues Actions Packages Projects Releases Wiki Activity

[X86] Change RDRAND to use PS instead of TB.

Browse Source 
Should be no functional change for now. A future disassembler change will prevent disassembling with 0xf2/0xf3.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316339 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Craig Topper 2017-10-23 16:22:38 +00:00
parent c021be0a0f
commit bb2015d598
1 changed files with 3 additions and 3 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

6
lib/Target/X86/X86InstrInfo.td
View File

@ -2180,13 +2180,13 @@ let Predicates = [HasMOVBE] in {
let Predicates = [HasRDRAND], Defs = [EFLAGS] in {
def RDRAND16r : I<0xC7, MRM6r, (outs GR16:$dst), (ins),
"rdrand{w}\t$dst",
[(set GR16:$dst, EFLAGS, (X86rdrand))]>, OpSize16, TB;
[(set GR16:$dst, EFLAGS, (X86rdrand))]>, OpSize16, PS;
def RDRAND32r : I<0xC7, MRM6r, (outs GR32:$dst), (ins),
"rdrand{l}\t$dst",
[(set GR32:$dst, EFLAGS, (X86rdrand))]>, OpSize32, TB;
[(set GR32:$dst, EFLAGS, (X86rdrand))]>, OpSize32, PS;
def RDRAND64r : RI<0xC7, MRM6r, (outs GR64:$dst), (ins),
"rdrand{q}\t$dst",
[(set GR64:$dst, EFLAGS, (X86rdrand))]>, TB;
[(set GR64:$dst, EFLAGS, (X86rdrand))]>, PS;
}
//===----------------------------------------------------------------------===//