RPCS3/llvm
1
0
Fork 0
mirror of https://github.com/RPCS3/llvm.git synced 2025-02-05 01:56:16 +00:00
Code Issues Actions Packages Projects Releases Wiki Activity

brg

Browse Source 
X86Implicit.cpp, X86Implicit.h: New files.
InstSelectSimple.cpp: Add some clarifications in visitCallInst comments.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4874 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Brian Gaeke 2002-12-03 00:51:09 +00:00
parent 8562d4ec7c
commit bb25f2f08d
4 changed files with 111 additions and 2 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
lib/Target/X86/InstSelectSimple.cpp
View File

@ -397,6 +397,8 @@ ISel::visitCallInst (CallInst & CI)
{
case cByte:
case cShort:
// Promote V to 32 bits wide, and move the result into EAX,
// then push EAX.
promote32 (X86::EAX, v);
BuildMI (BB, X86::PUSHr32, 1).addReg (X86::EAX);
break;
@ -405,7 +407,7 @@ ISel::visitCallInst (CallInst & CI)
BuildMI (BB, X86::PUSHr32, 1).addReg (argReg);
break;
default:
// FIXME
// FIXME: long/ulong/double args not handled.
visitInstruction (CI);
break;
}

4
lib/Target/X86/X86ISelSimple.cpp
View File

@ -397,6 +397,8 @@ ISel::visitCallInst (CallInst & CI)
{
case cByte:
case cShort:
// Promote V to 32 bits wide, and move the result into EAX,
// then push EAX.
promote32 (X86::EAX, v);
BuildMI (BB, X86::PUSHr32, 1).addReg (X86::EAX);
break;
@ -405,7 +407,7 @@ ISel::visitCallInst (CallInst & CI)
BuildMI (BB, X86::PUSHr32, 1).addReg (argReg);
break;
default:
// FIXME
// FIXME: long/ulong/double args not handled.
visitInstruction (CI);
break;
}

87
lib/Target/X86/X86Implicit.cpp Normal file
View File

@ -0,0 +1,87 @@
//===-- X86Implicit.cpp - All the implicit uses and defs for X86 ops ------===//
//
// This defines a class which maps X86 opcodes to the registers that they
// implicitly modify or use.
//
//===----------------------------------------------------------------------===//
#include "X86Implicit.h"
#include <map>
#include <vector>
X86Implicit::X86Implicit ()
{
implicitUses[X86::CBW].push_back (X86::AL);
implicitDefs[X86::CBW].push_back (X86::AX);
implicitUses[X86::CDQ].push_back (X86::EAX);
implicitDefs[X86::CDQ].push_back (X86::EDX);
implicitUses[X86::CWD].push_back (X86::AX);
implicitDefs[X86::CWD].push_back (X86::DX);
implicitUses[X86::DIVrr16].push_back (X86::DX);
implicitUses[X86::DIVrr16].push_back (X86::AX);
implicitDefs[X86::DIVrr16].push_back (X86::DX);
implicitDefs[X86::DIVrr16].push_back (X86::AX);
implicitUses[X86::DIVrr32].push_back (X86::EDX);
implicitUses[X86::DIVrr32].push_back (X86::EAX);
implicitDefs[X86::DIVrr32].push_back (X86::EDX);
implicitDefs[X86::DIVrr32].push_back (X86::EAX);
implicitUses[X86::DIVrr8].push_back (X86::AX);
implicitDefs[X86::DIVrr8].push_back (X86::AL);
implicitDefs[X86::DIVrr8].push_back (X86::AH);
implicitDefs[X86::FNSTSWr8].push_back (X86::AX);
implicitUses[X86::IDIVrr16].push_back (X86::DX);
implicitUses[X86::IDIVrr16].push_back (X86::AX);
implicitDefs[X86::IDIVrr16].push_back (X86::DX);
implicitDefs[X86::IDIVrr16].push_back (X86::AX);
implicitUses[X86::IDIVrr32].push_back (X86::EDX);
implicitUses[X86::IDIVrr32].push_back (X86::EAX);
implicitDefs[X86::IDIVrr32].push_back (X86::EDX);
implicitDefs[X86::IDIVrr32].push_back (X86::EAX);
implicitUses[X86::IDIVrr8].push_back (X86::AX);
implicitDefs[X86::IDIVrr8].push_back (X86::AL);
implicitDefs[X86::IDIVrr8].push_back (X86::AH);
implicitUses[X86::LEAVE].push_back (X86::EBP);
implicitDefs[X86::LEAVE].push_back (X86::EBP);
implicitUses[X86::MULrr16].push_back (X86::AX);
implicitDefs[X86::MULrr16].push_back (X86::DX);
implicitDefs[X86::MULrr16].push_back (X86::AX);
implicitUses[X86::MULrr32].push_back (X86::EAX);
implicitDefs[X86::MULrr32].push_back (X86::EDX);
implicitDefs[X86::MULrr32].push_back (X86::EAX);
implicitUses[X86::MULrr8].push_back (X86::AL);
implicitDefs[X86::MULrr8].push_back (X86::AX);
implicitUses[X86::SAHF].push_back (X86::AH);
implicitUses[X86::SARrr16].push_back (X86::CL);
implicitUses[X86::SARrr32].push_back (X86::CL);
implicitUses[X86::SARrr8].push_back (X86::CL);
implicitUses[X86::SHLrr16].push_back (X86::CL);
implicitUses[X86::SHLrr32].push_back (X86::CL);
implicitUses[X86::SHLrr8].push_back (X86::CL);
implicitUses[X86::SHRrr16].push_back (X86::CL);
implicitUses[X86::SHRrr32].push_back (X86::CL);
implicitUses[X86::SHRrr8].push_back (X86::CL);
}

18
lib/Target/X86/X86Implicit.h Normal file
View File

@ -0,0 +1,18 @@
//===-- X86Implicit.h - All the implicit uses and defs for X86 ops --------===//
//
// This defines a class which maps X86 opcodes to the registers that they
// implicitly modify or use.
//
//===----------------------------------------------------------------------===//
#include "X86.h"
#include <map>
#include <vector>
class X86Implicit {
public:
typedef std::map <X86::Opcode, std::vector <X86::Register> > ImplicitMap;
ImplicitMap implicitUses;
ImplicitMap implicitDefs;
X86Implicit ();
};