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remove the V8 simple isel

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25534 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chris Lattner 2006-01-23 07:20:15 +00:00
parent 2c6d99cbf8
commit bb978c7e98
6 changed files with 8 additions and 3680 deletions
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1
lib/Target/Sparc/Sparc.h
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@ -22,7 +22,6 @@ namespace llvm {
class FunctionPass;
class TargetMachine;
FunctionPass *createSparcV8SimpleInstructionSelector(TargetMachine &TM);
FunctionPass *createSparcV8ISelDag(TargetMachine &TM);
FunctionPass *createSparcV8CodePrinterPass(std::ostream &OS,

20
lib/Target/Sparc/SparcTargetMachine.cpp
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@ -27,10 +27,6 @@ using namespace llvm;
namespace {
// Register the target.
RegisterTarget<SparcV8TargetMachine> X("sparcv8"," SPARC V8 (experimental)");
cl::opt<bool> EnableV8DAGDAG("enable-v8-dag-isel", cl::Hidden,
cl::desc("Enable DAG-to-DAG isel for V8"),
cl::init(0));
}
/// SparcV8TargetMachine ctor - Create an ILP32 architecture model
@ -83,18 +79,10 @@ bool SparcV8TargetMachine::addPassesToEmitFile(PassManager &PM,
if (PrintMachineCode)
PM.add(new PrintFunctionPass());
if (!EnableV8DAGDAG) {
// Replace malloc and free instructions with library calls.
PM.add(createLowerAllocationsPass());
PM.add(createLowerSelectPass());
// Make sure that no unreachable blocks are instruction selected.
PM.add(createUnreachableBlockEliminationPass());
PM.add(createSparcV8SimpleInstructionSelector(*this));
} else {
// Make sure that no unreachable blocks are instruction selected.
PM.add(createUnreachableBlockEliminationPass());
PM.add(createSparcV8ISelDag(*this));
}
// Make sure that no unreachable blocks are instruction selected.
PM.add(createUnreachableBlockEliminationPass());
PM.add(createSparcV8ISelDag(*this));
// Print machine instructions as they were initially generated.
if (PrintMachineCode)

1823
lib/Target/Sparc/SparcV8ISelSimple.cpp
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File diff suppressed because it is too large Load Diff

1
lib/Target/SparcV8/SparcV8.h
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@ -22,7 +22,6 @@ namespace llvm {
class FunctionPass;
class TargetMachine;
FunctionPass *createSparcV8SimpleInstructionSelector(TargetMachine &TM);
FunctionPass *createSparcV8ISelDag(TargetMachine &TM);
FunctionPass *createSparcV8CodePrinterPass(std::ostream &OS,

1823
lib/Target/SparcV8/SparcV8ISelSimple.cpp
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File diff suppressed because it is too large Load Diff

20
lib/Target/SparcV8/SparcV8TargetMachine.cpp
View File

@ -27,10 +27,6 @@ using namespace llvm;
namespace {
// Register the target.
RegisterTarget<SparcV8TargetMachine> X("sparcv8"," SPARC V8 (experimental)");
cl::opt<bool> EnableV8DAGDAG("enable-v8-dag-isel", cl::Hidden,
cl::desc("Enable DAG-to-DAG isel for V8"),
cl::init(0));
}
/// SparcV8TargetMachine ctor - Create an ILP32 architecture model
@ -83,18 +79,10 @@ bool SparcV8TargetMachine::addPassesToEmitFile(PassManager &PM,
if (PrintMachineCode)
PM.add(new PrintFunctionPass());
if (!EnableV8DAGDAG) {
// Replace malloc and free instructions with library calls.
PM.add(createLowerAllocationsPass());
PM.add(createLowerSelectPass());
// Make sure that no unreachable blocks are instruction selected.
PM.add(createUnreachableBlockEliminationPass());
PM.add(createSparcV8SimpleInstructionSelector(*this));
} else {
// Make sure that no unreachable blocks are instruction selected.
PM.add(createUnreachableBlockEliminationPass());
PM.add(createSparcV8ISelDag(*this));
}
// Make sure that no unreachable blocks are instruction selected.
PM.add(createUnreachableBlockEliminationPass());
PM.add(createSparcV8ISelDag(*this));
// Print machine instructions as they were initially generated.
if (PrintMachineCode)