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Remove AVX 256-bit unaligned load intrinsics. 128-bit versions had been removed a while ago.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148922 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -1300,12 +1300,6 @@ let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.".
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// SIMD load ops
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let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.".
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def int_x86_avx_loadu_pd_256 : GCCBuiltin<"__builtin_ia32_loadupd256">,
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Intrinsic<[llvm_v4f64_ty], [llvm_ptr_ty], [IntrReadMem]>;
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def int_x86_avx_loadu_ps_256 : GCCBuiltin<"__builtin_ia32_loadups256">,
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Intrinsic<[llvm_v8f32_ty], [llvm_ptr_ty], [IntrReadMem]>;
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def int_x86_avx_loadu_dq_256 : GCCBuiltin<"__builtin_ia32_loaddqu256">,
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Intrinsic<[llvm_v32i8_ty], [llvm_ptr_ty], [IntrReadMem]>;
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def int_x86_avx_ldu_dq_256 : GCCBuiltin<"__builtin_ia32_lddqu256">,
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Intrinsic<[llvm_v32i8_ty], [llvm_ptr_ty], [IntrReadMem]>;
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}
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@ -839,11 +839,8 @@ def : Pat<(v4f64 (X86vzmovl
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}
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def : Pat<(int_x86_avx_loadu_ps_256 addr:$src), (VMOVUPSYrm addr:$src)>;
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def : Pat<(int_x86_avx_storeu_ps_256 addr:$dst, VR256:$src),
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(VMOVUPSYmr addr:$dst, VR256:$src)>;
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def : Pat<(int_x86_avx_loadu_pd_256 addr:$src), (VMOVUPDYrm addr:$src)>;
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def : Pat<(int_x86_avx_storeu_pd_256 addr:$dst, VR256:$src),
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(VMOVUPDYmr addr:$dst, VR256:$src)>;
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@ -3461,7 +3458,6 @@ def MOVDQUmr_Int : I<0x7F, MRMDestMem, (outs), (ins i128mem:$dst, VR128:$src),
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} // ExeDomain = SSEPackedInt
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let Predicates = [HasAVX] in {
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def : Pat<(int_x86_avx_loadu_dq_256 addr:$src), (VMOVDQUYrm addr:$src)>;
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def : Pat<(int_x86_avx_storeu_dq_256 addr:$dst, VR256:$src),
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(VMOVDQUYmr addr:$dst, VR256:$src)>;
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}
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