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Small correction to unordered memory code generation of ARM LDRD

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The information was correct pre-LPAE.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184253 91177308-0d34-0410-b5e6-96231b3b80d8
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JF Bastien 2013-06-18 23:07:16 +00:00
parent 041a18dbb3
commit bd4bd3686d
1 changed files with 1 additions and 1 deletions
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docs/Atomics.rst
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@ -211,7 +211,7 @@ Notes for code generation
never stored. A normal load or store instruction is usually sufficient, but
note that an unordered load or store cannot be split into multiple
instructions (or an instruction which does multiple memory operations, like
``LDRD`` on ARM).
``LDRD`` on ARM without LPAE, or not naturally-aligned ``LDRD`` on LPAE ARM).
Monotonic
---------