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[X86][RTM] Regenerate RTM intrinsic tests for 32/64-bit targets.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@297518 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -1,4 +1,6 @@
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; RUN: llc < %s -mattr=+rtm -mtriple=x86_64-unknown-unknown | FileCheck %s
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+rtm | FileCheck %s --check-prefix=X86
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+rtm | FileCheck %s --check-prefix=X64
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declare i32 @llvm.x86.xbegin() nounwind
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declare void @llvm.x86.xend() nounwind
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@ -6,39 +8,78 @@ declare void @llvm.x86.xabort(i8) nounwind
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declare void @f1()
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define i32 @test_xbegin() nounwind uwtable {
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; X86-LABEL: test_xbegin:
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; X86: # BB#0: # %entry
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; X86-NEXT: xbegin .LBB0_2
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; X86-NEXT: # BB#1: # %entry
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; X86-NEXT: movl $-1, %eax
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; X86-NEXT: .LBB0_2: # %entry
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; X86-NEXT: retl
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;
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; X64-LABEL: test_xbegin:
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; X64: # BB#0: # %entry
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; X64-NEXT: xbegin .LBB0_2
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; X64-NEXT: # BB#1: # %entry
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; X64-NEXT: movl $-1, %eax
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; X64-NEXT: .LBB0_2: # %entry
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; X64-NEXT: retq
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entry:
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%0 = tail call i32 @llvm.x86.xbegin() nounwind
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ret i32 %0
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; CHECK: test_xbegin
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; CHECK: xbegin [[LABEL:.*BB.*]]
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; CHECK: [[LABEL]]:
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}
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define void @test_xend() nounwind uwtable {
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; X86-LABEL: test_xend:
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; X86: # BB#0: # %entry
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; X86-NEXT: xend
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; X86-NEXT: retl
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;
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; X64-LABEL: test_xend:
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; X64: # BB#0: # %entry
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; X64-NEXT: xend
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; X64-NEXT: retq
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entry:
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tail call void @llvm.x86.xend() nounwind
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ret void
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; CHECK: test_xend
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; CHECK: xend
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}
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define void @test_xabort() nounwind uwtable {
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; X86-LABEL: test_xabort:
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; X86: # BB#0: # %entry
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; X86-NEXT: xabort $2
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; X86-NEXT: retl
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;
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; X64-LABEL: test_xabort:
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; X64: # BB#0: # %entry
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; X64-NEXT: xabort $2
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; X64-NEXT: retq
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entry:
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tail call void @llvm.x86.xabort(i8 2)
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ret void
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; CHECK: test_xabort
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; CHECK: xabort $2
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}
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define void @f2(i32 %x) nounwind uwtable {
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; X86-LABEL: f2:
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; X86: # BB#0: # %entry
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; X86-NEXT: xabort $1
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; X86-NEXT: calll f1
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; X86-NEXT: retl
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;
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; X64-LABEL: f2:
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; X64: # BB#0: # %entry
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; X64-NEXT: pushq %rax
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; X64-NEXT: .Lcfi0:
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; X64-NEXT: .cfi_def_cfa_offset 16
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; X64-NEXT: movl %edi, {{[0-9]+}}(%rsp)
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; X64-NEXT: xabort $1
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; X64-NEXT: callq f1
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; X64-NEXT: popq %rax
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; X64-NEXT: retq
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entry:
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%x.addr = alloca i32, align 4
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store i32 %x, i32* %x.addr, align 4
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call void @llvm.x86.xabort(i8 1)
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call void @f1()
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ret void
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; CHECK-LABEL: f2
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; CHECK: xabort $1
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; CHECK: callq f1
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}
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