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[X86][RTM] Regenerate RTM intrinsic tests for 32/64-bit targets.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@297518 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Simon Pilgrim 2017-03-10 21:55:24 +00:00
parent 1b61f52d06
commit be5b44e27d
1 changed files with 53 additions and 12 deletions
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65
test/CodeGen/X86/rtm.ll
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@ -1,4 +1,6 @@
; RUN: llc < %s -mattr=+rtm -mtriple=x86_64-unknown-unknown | FileCheck %s ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+rtm | FileCheck %s --check-prefix=X86
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+rtm | FileCheck %s --check-prefix=X64
declare i32 @llvm.x86.xbegin() nounwind declare i32 @llvm.x86.xbegin() nounwind
declare void @llvm.x86.xend() nounwind declare void @llvm.x86.xend() nounwind
@ -6,39 +8,78 @@ declare void @llvm.x86.xabort(i8) nounwind
declare void @f1() declare void @f1()
define i32 @test_xbegin() nounwind uwtable { define i32 @test_xbegin() nounwind uwtable {
; X86-LABEL: test_xbegin:
; X86: # BB#0: # %entry
; X86-NEXT: xbegin .LBB0_2
; X86-NEXT: # BB#1: # %entry
; X86-NEXT: movl $-1, %eax
; X86-NEXT: .LBB0_2: # %entry
; X86-NEXT: retl
;
; X64-LABEL: test_xbegin:
; X64: # BB#0: # %entry
; X64-NEXT: xbegin .LBB0_2
; X64-NEXT: # BB#1: # %entry
; X64-NEXT: movl $-1, %eax
; X64-NEXT: .LBB0_2: # %entry
; X64-NEXT: retq
entry: entry:
%0 = tail call i32 @llvm.x86.xbegin() nounwind %0 = tail call i32 @llvm.x86.xbegin() nounwind
ret i32 %0 ret i32 %0
; CHECK: test_xbegin
; CHECK: xbegin [[LABEL:.*BB.*]]
; CHECK: [[LABEL]]:
} }
define void @test_xend() nounwind uwtable { define void @test_xend() nounwind uwtable {
; X86-LABEL: test_xend:
; X86: # BB#0: # %entry
; X86-NEXT: xend
; X86-NEXT: retl
;
; X64-LABEL: test_xend:
; X64: # BB#0: # %entry
; X64-NEXT: xend
; X64-NEXT: retq
entry: entry:
tail call void @llvm.x86.xend() nounwind tail call void @llvm.x86.xend() nounwind
ret void ret void
; CHECK: test_xend
; CHECK: xend
} }
define void @test_xabort() nounwind uwtable { define void @test_xabort() nounwind uwtable {
; X86-LABEL: test_xabort:
; X86: # BB#0: # %entry
; X86-NEXT: xabort $2
; X86-NEXT: retl
;
; X64-LABEL: test_xabort:
; X64: # BB#0: # %entry
; X64-NEXT: xabort $2
; X64-NEXT: retq
entry: entry:
tail call void @llvm.x86.xabort(i8 2) tail call void @llvm.x86.xabort(i8 2)
ret void ret void
; CHECK: test_xabort
; CHECK: xabort $2
} }
define void @f2(i32 %x) nounwind uwtable { define void @f2(i32 %x) nounwind uwtable {
; X86-LABEL: f2:
; X86: # BB#0: # %entry
; X86-NEXT: xabort $1
; X86-NEXT: calll f1
; X86-NEXT: retl
;
; X64-LABEL: f2:
; X64: # BB#0: # %entry
; X64-NEXT: pushq %rax
; X64-NEXT: .Lcfi0:
; X64-NEXT: .cfi_def_cfa_offset 16
; X64-NEXT: movl %edi, {{[0-9]+}}(%rsp)
; X64-NEXT: xabort $1
; X64-NEXT: callq f1
; X64-NEXT: popq %rax
; X64-NEXT: retq
entry: entry:
%x.addr = alloca i32, align 4 %x.addr = alloca i32, align 4
store i32 %x, i32* %x.addr, align 4 store i32 %x, i32* %x.addr, align 4
call void @llvm.x86.xabort(i8 1) call void @llvm.x86.xabort(i8 1)
call void @f1() call void @f1()
ret void ret void
; CHECK-LABEL: f2
; CHECK: xabort $1
; CHECK: callq f1
} }